36 const char* Mips::MipsFCCToString(Mips::CondCode CC) {  in MipsFCCToString()
84   case Mips::RDHWR:  in printInst()
85   case Mips::RDHWR64:  in printInst()
89   case Mips::Save16:  in printInst()
94   case Mips::SaveX16:  in printInst()
99   case Mips::Restore16:  in printInst()
104   case Mips::RestoreX16:  in printInst()
120   case Mips::RDHWR:  in printInst()
121   case Mips::RDHWR64:  in printInst()
166     if (STI.hasFeature(Mips::FeatureMips32))  in printBranchOperand()
168     else if (STI.hasFeature(Mips::FeatureMips16))  in printBranchOperand()
204   case Mips::SWM32_MM:  in printMemOperand()
205   case Mips::LWM32_MM:  in printMemOperand()
206   case Mips::SWM16_MM:  in printMemOperand()
207   case Mips::SWM16_MMR6:  in printMemOperand()
208   case Mips::LWM16_MM:  in printMemOperand()
209   case Mips::LWM16_MMR6:  in printMemOperand()
234   O << MipsFCCToString((Mips::CondCode)MO.getImm());  in printFCCOperand()
270   case Mips::BEQ:  in printAlias()
271   case Mips::BEQ_MM:  in printAlias()
274     return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&  in printAlias()
276            (isReg<Mips::ZERO>(MI, 1) &&  in printAlias()
278   case Mips::BEQ64:  in printAlias()
280     return isReg<Mips::ZERO_64>(MI, 1) &&  in printAlias()
282   case Mips::BNE:  in printAlias()
283   case Mips::BNE_MM:  in printAlias()
285     return isReg<Mips::ZERO>(MI, 1) &&  in printAlias()
287   case Mips::BNE64:  in printAlias()
289     return isReg<Mips::ZERO_64>(MI, 1) &&  in printAlias()
291   case Mips::BGEZAL:  in printAlias()
293     return isReg<Mips::ZERO>(MI, 0) &&  in printAlias()
295   case Mips::BC1T:  in printAlias()
297     return isReg<Mips::FCC0>(MI, 0) &&  in printAlias()
299   case Mips::BC1F:  in printAlias()
301     return isReg<Mips::FCC0>(MI, 0) &&  in printAlias()
303   case Mips::JALR:  in printAlias()
306     return (isReg<Mips::ZERO>(MI, 0) &&  in printAlias()
308            (isReg<Mips::RA>(MI, 0) &&  in printAlias()
310   case Mips::JALR64:  in printAlias()
313     return (isReg<Mips::ZERO_64>(MI, 0) &&  in printAlias()
315            (isReg<Mips::RA_64>(MI, 0) &&  in printAlias()
317   case Mips::NOR:  in printAlias()
318   case Mips::NOR_MM:  in printAlias()
319   case Mips::NOR_MMR6:  in printAlias()
321     return isReg<Mips::ZERO>(MI, 2) &&  in printAlias()
323   case Mips::NOR64:  in printAlias()
325     return isReg<Mips::ZERO_64>(MI, 2) &&  in printAlias()
327   case Mips::OR:  in printAlias()
328   case Mips::ADDu:  in printAlias()
331     return isReg<Mips::ZERO>(MI, 2) &&  in printAlias()