Lines Matching refs:Mips
47 IsMicroMips(STI.getFeatureBits()[Mips::FeatureMicroMips]), in MipsDisassembler()
50 bool hasMips2() const { return STI.getFeatureBits()[Mips::FeatureMips2]; } in hasMips2()
51 bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; } in hasMips3()
52 bool hasMips32() const { return STI.getFeatureBits()[Mips::FeatureMips32]; } in hasMips32()
55 return STI.getFeatureBits()[Mips::FeatureMips32r6]; in hasMips32r6()
58 bool isFP64() const { return STI.getFeatureBits()[Mips::FeatureFP64Bit]; } in isFP64()
60 bool isGP64() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; } in isGP64()
62 bool isPTR64() const { return STI.getFeatureBits()[Mips::FeaturePTR64Bit]; } in isPTR64()
64 bool hasCnMips() const { return STI.getFeatureBits()[Mips::FeatureCnMips]; } in hasCnMips()
66 bool hasCnMipsP() const { return STI.getFeatureBits()[Mips::FeatureCnMipsP]; } in hasCnMipsP()
576 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
578 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
590 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
592 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
619 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch()
622 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch()
625 MI.setOpcode(Mips::BEQZALC); in DecodeAddiGroupBranch()
628 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
631 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
647 MI.setOpcode(Mips::BOVC_MMR6); in DecodePOP35GroupBranchMMR6()
648 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
650 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
654 MI.setOpcode(Mips::BEQC_MMR6); in DecodePOP35GroupBranchMMR6()
655 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
657 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
661 MI.setOpcode(Mips::BEQZALC_MMR6); in DecodePOP35GroupBranchMMR6()
662 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP35GroupBranchMMR6()
692 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch()
695 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch()
698 MI.setOpcode(Mips::BNEZALC); in DecodeDaddiGroupBranch()
701 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeDaddiGroupBranch()
704 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeDaddiGroupBranch()
720 MI.setOpcode(Mips::BNVC_MMR6); in DecodePOP37GroupBranchMMR6()
721 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
723 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
727 MI.setOpcode(Mips::BNEC_MMR6); in DecodePOP37GroupBranchMMR6()
728 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
730 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
734 MI.setOpcode(Mips::BNEZALC_MMR6); in DecodePOP37GroupBranchMMR6()
735 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP37GroupBranchMMR6()
764 MI.setOpcode(Mips::BGTZC_MMR6); in DecodePOP65GroupBranchMMR6()
766 MI.setOpcode(Mips::BLTZC_MMR6); in DecodePOP65GroupBranchMMR6()
768 MI.setOpcode(Mips::BLTC_MMR6); in DecodePOP65GroupBranchMMR6()
773 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP65GroupBranchMMR6()
776 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP65GroupBranchMMR6()
803 MI.setOpcode(Mips::BLEZC_MMR6); in DecodePOP75GroupBranchMMR6()
805 MI.setOpcode(Mips::BGEZC_MMR6); in DecodePOP75GroupBranchMMR6()
808 MI.setOpcode(Mips::BGEC_MMR6); in DecodePOP75GroupBranchMMR6()
812 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP75GroupBranchMMR6()
815 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodePOP75GroupBranchMMR6()
846 MI.setOpcode(Mips::BLEZC); in DecodeBlezlGroupBranch()
848 MI.setOpcode(Mips::BGEZC); in DecodeBlezlGroupBranch()
851 MI.setOpcode(Mips::BGEC); in DecodeBlezlGroupBranch()
855 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezlGroupBranch()
858 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezlGroupBranch()
890 MI.setOpcode(Mips::BGTZC); in DecodeBgtzlGroupBranch()
892 MI.setOpcode(Mips::BLTZC); in DecodeBgtzlGroupBranch()
894 MI.setOpcode(Mips::BLTC); in DecodeBgtzlGroupBranch()
899 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzlGroupBranch()
902 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzlGroupBranch()
932 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
935 MI.setOpcode(Mips::BGTZALC); in DecodeBgtzGroupBranch()
938 MI.setOpcode(Mips::BLTZALC); in DecodeBgtzGroupBranch()
941 MI.setOpcode(Mips::BLTUC); in DecodeBgtzGroupBranch()
947 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzGroupBranch()
951 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBgtzGroupBranch()
982 MI.setOpcode(Mips::BLEZALC); in DecodeBlezGroupBranch()
984 MI.setOpcode(Mips::BGEZALC); in DecodeBlezGroupBranch()
987 MI.setOpcode(Mips::BGEUC); in DecodeBlezGroupBranch()
991 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezGroupBranch()
993 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeBlezGroupBranch()
1012 case Mips::DEXT: in DecodeDEXT()
1016 case Mips::DEXTM: in DecodeDEXT()
1020 case Mips::DEXTU: in DecodeDEXT()
1028 MI.setOpcode(Mips::DEXT); in DecodeDEXT()
1034 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt))); in DecodeDEXT()
1036 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs))); in DecodeDEXT()
1054 case Mips::DINS: in DecodeDINS()
1058 case Mips::DINSM: in DecodeDINS()
1062 case Mips::DINSU: in DecodeDINS()
1075 MI.setOpcode(Mips::DINS); in DecodeDINS()
1077 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt))); in DecodeDINS()
1079 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs))); in DecodeDINS()
1092 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1094 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1096 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeCRC()
1345 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass()
1355 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass()
1365 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass()
1375 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass()
1385 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass()
1411 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass()
1422 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass()
1432 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass()
1442 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass()
1453 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass()
1464 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMem()
1465 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMem()
1467 if (Inst.getOpcode() == Mips::SC || in DecodeMem()
1468 Inst.getOpcode() == Mips::SCD) in DecodeMem()
1484 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemEVA()
1485 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemEVA()
1487 if (Inst.getOpcode() == Mips::SCE) in DecodeMemEVA()
1504 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeLoadByte15()
1505 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeLoadByte15()
1520 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheOp()
1536 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheOpMM()
1552 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodePrefeOpMM()
1568 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeCacheeOp_CacheOpR6()
1582 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSyncI()
1596 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSyncI_MM()
1609 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSynciR6()
1624 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg); in DecodeMSA128Mem()
1625 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMSA128Mem()
1643 case Mips::LD_B: in DecodeMSA128Mem()
1644 case Mips::ST_B: in DecodeMSA128Mem()
1647 case Mips::LD_H: in DecodeMSA128Mem()
1648 case Mips::ST_H: in DecodeMSA128Mem()
1651 case Mips::LD_W: in DecodeMSA128Mem()
1652 case Mips::ST_W: in DecodeMSA128Mem()
1655 case Mips::LD_D: in DecodeMSA128Mem()
1656 case Mips::ST_D: in DecodeMSA128Mem()
1672 case Mips::LBU16_MM: in DecodeMemMMImm4()
1673 case Mips::LHU16_MM: in DecodeMemMMImm4()
1674 case Mips::LW16_MM: in DecodeMemMMImm4()
1679 case Mips::SB16_MM: in DecodeMemMMImm4()
1680 case Mips::SB16_MMR6: in DecodeMemMMImm4()
1681 case Mips::SH16_MM: in DecodeMemMMImm4()
1682 case Mips::SH16_MMR6: in DecodeMemMMImm4()
1683 case Mips::SW16_MM: in DecodeMemMMImm4()
1684 case Mips::SW16_MMR6: in DecodeMemMMImm4()
1696 case Mips::LBU16_MM: in DecodeMemMMImm4()
1702 case Mips::SB16_MM: in DecodeMemMMImm4()
1703 case Mips::SB16_MMR6: in DecodeMemMMImm4()
1706 case Mips::LHU16_MM: in DecodeMemMMImm4()
1707 case Mips::SH16_MM: in DecodeMemMMImm4()
1708 case Mips::SH16_MMR6: in DecodeMemMMImm4()
1711 case Mips::LW16_MM: in DecodeMemMMImm4()
1712 case Mips::SW16_MM: in DecodeMemMMImm4()
1713 case Mips::SW16_MMR6: in DecodeMemMMImm4()
1727 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMSPImm5Lsl2()
1730 Inst.addOperand(MCOperand::createReg(Mips::SP)); in DecodeMemMMSPImm5Lsl2()
1742 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMGPImm7Lsl2()
1745 Inst.addOperand(MCOperand::createReg(Mips::GP)); in DecodeMemMMGPImm7Lsl2()
1756 case Mips::LWM16_MMR6: in DecodeMemMMReglistImm4Lsl2()
1757 case Mips::SWM16_MMR6: in DecodeMemMMReglistImm4Lsl2()
1769 Inst.addOperand(MCOperand::createReg(Mips::SP)); in DecodeMemMMReglistImm4Lsl2()
1782 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm9()
1783 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm9()
1785 if (Inst.getOpcode() == Mips::SCE_MM || Inst.getOpcode() == Mips::SC_MMR6) in DecodeMemMMImm9()
1802 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm12()
1803 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm12()
1806 case Mips::SWM32_MM: in DecodeMemMMImm12()
1807 case Mips::LWM32_MM: in DecodeMemMMImm12()
1814 case Mips::SC_MM: in DecodeMemMMImm12()
1819 if (Inst.getOpcode() == Mips::LWP_MM || Inst.getOpcode() == Mips::SWP_MM) in DecodeMemMMImm12()
1836 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm16()
1837 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeMemMMImm16()
1852 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); in DecodeFMem()
1853 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem()
1871 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); in DecodeFMemMMR2()
1872 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemMMR2()
1887 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMem2()
1888 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem2()
1903 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg); in DecodeFMem3()
1904 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMem3()
1920 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2R6()
1921 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemCop2R6()
1937 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2MMR6()
1938 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeFMemCop2MMR6()
1954 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt); in DecodeSpecial3LlSc()
1955 Base = getReg(Decoder, Mips::GPR32RegClassID, Base); in DecodeSpecial3LlSc()
1957 if(Inst.getOpcode() == Mips::SC_R6 || Inst.getOpcode() == Mips::SCD_R6){ in DecodeSpecial3LlSc()
1974 Inst.addOperand(MCOperand::createReg(Mips::HWR29)); in DecodeHWRegsRegisterClass()
1984 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2); in DecodeAFGR64RegisterClass()
1995 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo); in DecodeACC64DSPRegisterClass()
2006 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo); in DecodeHI32DSPRegisterClass()
2017 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo); in DecodeLO32DSPRegisterClass()
2028 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo); in DecodeMSA128BRegisterClass()
2039 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo); in DecodeMSA128HRegisterClass()
2050 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo); in DecodeMSA128WRegisterClass()
2061 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo); in DecodeMSA128DRegisterClass()
2072 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo); in DecodeMSACtrlRegisterClass()
2083 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo); in DecodeCOP0RegisterClass()
2094 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo); in DecodeCOP2RegisterClass()
2300 unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3, Mips::S4, Mips::S5, in DecodeRegListOperand()
2301 Mips::S6, Mips::S7, Mips::FP}; in DecodeRegListOperand()
2320 Inst.addOperand(MCOperand::createReg(Mips::RA)); in DecodeRegListOperand()
2328 unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3}; in DecodeRegListOperand16()
2334 case Mips::LWM16_MMR6: in DecodeRegListOperand16()
2335 case Mips::SWM16_MMR6: in DecodeRegListOperand16()
2344 Inst.addOperand(MCOperand::createReg(Mips::RA)); in DecodeRegListOperand16()
2382 Inst.addOperand(MCOperand::createReg(Mips::A1)); in DecodeMovePRegPair()
2383 Inst.addOperand(MCOperand::createReg(Mips::A2)); in DecodeMovePRegPair()
2386 Inst.addOperand(MCOperand::createReg(Mips::A1)); in DecodeMovePRegPair()
2387 Inst.addOperand(MCOperand::createReg(Mips::A3)); in DecodeMovePRegPair()
2390 Inst.addOperand(MCOperand::createReg(Mips::A2)); in DecodeMovePRegPair()
2391 Inst.addOperand(MCOperand::createReg(Mips::A3)); in DecodeMovePRegPair()
2394 Inst.addOperand(MCOperand::createReg(Mips::A0)); in DecodeMovePRegPair()
2395 Inst.addOperand(MCOperand::createReg(Mips::S5)); in DecodeMovePRegPair()
2398 Inst.addOperand(MCOperand::createReg(Mips::A0)); in DecodeMovePRegPair()
2399 Inst.addOperand(MCOperand::createReg(Mips::S6)); in DecodeMovePRegPair()
2402 Inst.addOperand(MCOperand::createReg(Mips::A0)); in DecodeMovePRegPair()
2403 Inst.addOperand(MCOperand::createReg(Mips::A1)); in DecodeMovePRegPair()
2406 Inst.addOperand(MCOperand::createReg(Mips::A0)); in DecodeMovePRegPair()
2407 Inst.addOperand(MCOperand::createReg(Mips::A2)); in DecodeMovePRegPair()
2410 Inst.addOperand(MCOperand::createReg(Mips::A0)); in DecodeMovePRegPair()
2411 Inst.addOperand(MCOperand::createReg(Mips::A3)); in DecodeMovePRegPair()
2445 MI.setOpcode(Mips::BGTZALC_MMR6); in DecodeBgtzGroupBranchMMR6()
2450 MI.setOpcode(Mips::BLTZALC_MMR6); in DecodeBgtzGroupBranchMMR6()
2455 MI.setOpcode(Mips::BLTUC_MMR6); in DecodeBgtzGroupBranchMMR6()
2463 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs))); in DecodeBgtzGroupBranchMMR6()
2467 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt))); in DecodeBgtzGroupBranchMMR6()
2493 MI.setOpcode(Mips::BLEZALC_MMR6); in DecodeBlezGroupBranchMMR6()
2497 MI.setOpcode(Mips::BGEZALC_MMR6); in DecodeBlezGroupBranchMMR6()
2502 MI.setOpcode(Mips::BGEUC_MMR6); in DecodeBlezGroupBranchMMR6()
2508 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs))); in DecodeBlezGroupBranchMMR6()
2510 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt))); in DecodeBlezGroupBranchMMR6()