Lines Matching refs:rd

233     let rd = 0;
253 let isIndirectBranch = 1, rd = 0 in {
303 (outs GR16:$rd), (ins), "pop\t$rd", []> {
320 (outs GR8:$rd), (ins GR8:$rs),
321 "mov.b\t{$rs, $rd}",
324 (outs GR16:$rd), (ins GR16:$rs),
325 "mov\t{$rs, $rd}",
331 (outs GR8:$rd), (ins cg8imm:$imm),
332 "mov.b\t$imm, $rd",
333 [(set GR8:$rd, cg8imm:$imm)]>;
335 (outs GR16:$rd), (ins cg16imm:$imm),
336 "mov\t$imm, $rd",
337 [(set GR16:$rd, cg16imm:$imm)]>;
339 (outs GR8:$rd), (ins i8imm:$imm),
340 "mov.b\t{$imm, $rd}",
341 [(set GR8:$rd, imm:$imm)]>;
343 (outs GR16:$rd), (ins i16imm:$imm),
344 "mov\t{$imm, $rd}",
345 [(set GR16:$rd, imm:$imm)]>;
350 (outs GR8:$rd), (ins memsrc:$src),
351 "mov.b\t{$src, $rd}",
352 [(set GR8:$rd, (load addr:$src))]>;
354 (outs GR16:$rd), (ins memsrc:$src),
355 "mov\t{$src, $rd}",
356 [(set GR16:$rd, (load addr:$src))]>;
358 (outs GR8:$rd), (ins indreg:$rs),
359 "mov.b\t{$rs, $rd}",
360 [(set GR8:$rd, (load addr:$rs))]>;
362 (outs GR16:$rd), (ins indreg:$rs),
363 "mov\t{$rs, $rd}",
364 [(set GR16:$rd, (load addr:$rs))]>;
369 (outs GR16:$rd), (ins GR8:$rs),
370 "mov.b\t{$rs, $rd}",
371 [(set GR16:$rd, (zext GR8:$rs))]>;
373 (outs GR16:$rd), (ins memsrc:$src),
374 "mov.b\t{$src, $rd}",
375 [(set GR16:$rd, (zextloadi16i8 addr:$src))]>;
380 (outs GR8:$rd, GR16:$wb), (ins postreg:$rs),
381 "mov.b\t{$rs, $rd}", []>;
383 (outs GR16:$rd, GR16:$wb), (ins postreg:$rs),
384 "mov\t{$rs, $rd}", []>;
449 let Constraints = "$src2 = $rd" in {
451 def 8rr : I8rr<opcode, (outs GR8:$rd), (ins GR8:$src2, GR8:$rs),
452 !strconcat(asmstring, ".b\t$rs, $rd"),
453 [(set GR8:$rd, (node GR8:$src2, GR8:$rs)),
455 def 16rr : I16rr<opcode, (outs GR16:$rd), (ins GR16:$src2, GR16:$rs),
456 !strconcat(asmstring, "\t$rs, $rd"),
457 [(set GR16:$rd, (node GR16:$src2, GR16:$rs)),
460 def 8rm : I8rm<opcode, (outs GR8:$rd), (ins GR8:$src2, memsrc:$src),
461 !strconcat(asmstring, ".b\t$src, $rd"),
462 [(set GR8:$rd, (node GR8:$src2, (load addr:$src))),
464 def 16rm : I16rm<opcode, (outs GR16:$rd), (ins GR16:$src2, memsrc:$src),
465 !strconcat(asmstring, "\t$src, $rd"),
466 [(set GR16:$rd, (node GR16:$src2, (load addr:$src))),
468 def 8rn : I8rn<opcode, (outs GR8:$rd), (ins GR8:$src2, indreg:$rs),
469 !strconcat(asmstring, ".b\t$rs, $rd"), []>;
470 def 16rn : I16rn<opcode, (outs GR16:$rd), (ins GR16:$src2, indreg:$rs),
471 !strconcat(asmstring, "\t$rs, $rd"), []>;
474 Constraints = "$rs = $wb, $src2 = $rd" in {
475 def 8rp : I8rp<opcode, (outs GR8:$rd, GR16:$wb), (ins GR8:$src2, postreg:$rs),
476 !strconcat(asmstring, ".b\t$rs, $rd"), []>;
477 def 16rp : I16rp<opcode, (outs GR16:$rd, GR16:$wb), (ins GR16:$src2, postreg:$rs),
478 !strconcat(asmstring, "\t$rs, $rd"), []>;
480 def 8rc : I8rc<opcode, (outs GR8:$rd), (ins GR8:$src2, cg8imm:$imm),
481 !strconcat(asmstring, ".b\t$imm, $rd"),
482 [(set GR8:$rd, (node GR8:$src2, cg8imm:$imm)),
484 def 16rc : I16rc<opcode, (outs GR16:$rd), (ins GR16:$src2, cg16imm:$imm),
485 !strconcat(asmstring, "\t$imm, $rd"),
486 [(set GR16:$rd, (node GR16:$src2, cg16imm:$imm)),
488 def 8ri : I8ri<opcode, (outs GR8:$rd), (ins GR8:$src2, i8imm:$imm),
489 !strconcat(asmstring, ".b\t$imm, $rd"),
490 [(set GR8:$rd, (node GR8:$src2, imm:$imm)),
492 def 16ri : I16ri<opcode, (outs GR16:$rd), (ins GR16:$src2, i16imm:$imm),
493 !strconcat(asmstring, "\t$imm, $rd"),
494 [(set GR16:$rd, (node GR16:$src2, imm:$imm)),
627 let Constraints = "$rs = $rd" in {
631 (outs GR8:$rd), (ins GR8:$rs),
632 "rra.b\t$rd",
633 [(set GR8:$rd, (MSP430rra GR8:$rs)),
636 (outs GR16:$rd), (ins GR16:$rs),
637 "rra\t$rd",
638 [(set GR16:$rd, (MSP430rra GR16:$rs)),
643 (outs GR8:$rd), (ins GR8:$rs),
644 "rrc.b\t$rd",
645 [(set GR8:$rd, (MSP430rrc GR8:$rs)),
648 (outs GR16:$rd), (ins GR16:$rs),
649 "rrc\t$rd",
650 [(set GR16:$rd, (MSP430rrc GR16:$rs)),
655 (outs GR16:$rd), (ins GR16:$rs),
656 "sxt\t$rd",
657 [(set GR16:$rd, (sext_inreg GR16:$rs, i8)),
664 (outs GR16:$rd), (ins GR16:$rs),
665 "mov.b\t{$rs, $rd}",
666 [(set GR16:$rd, (zext (trunc GR16:$rs)))]>;
669 (outs GR16:$rd), (ins GR16:$rs),
670 "swpb\t$rd",
671 [(set GR16:$rd, (bswap GR16:$rs))]>;
733 (outs), (ins GR8:$rd, GR8:$rs),
734 "cmp.b\t$rs, $rd",
735 [(MSP430cmp GR8:$rd, GR8:$rs), (implicit SR)]>;
737 (outs), (ins GR16:$rd, GR16:$rs),
738 "cmp\t$rs, $rd",
739 [(MSP430cmp GR16:$rd, GR16:$rs), (implicit SR)]>;
742 (outs), (ins GR8:$rd, cg8imm:$imm),
743 "cmp.b\t$imm, $rd",
744 [(MSP430cmp GR8:$rd, cg8imm:$imm), (implicit SR)]>;
746 (outs), (ins GR16:$rd, cg16imm:$imm),
747 "cmp\t$imm, $rd",
748 [(MSP430cmp GR16:$rd, cg16imm:$imm), (implicit SR)]>;
751 (outs), (ins GR8:$rd, i8imm:$imm),
752 "cmp.b\t$imm, $rd",
753 [(MSP430cmp GR8:$rd, imm:$imm), (implicit SR)]>;
755 (outs), (ins GR16:$rd, i16imm:$imm),
756 "cmp\t$imm, $rd",
757 [(MSP430cmp GR16:$rd, imm:$imm), (implicit SR)]>;
782 (outs), (ins GR8:$rd, memsrc:$src),
783 "cmp.b\t$src, $rd",
784 [(MSP430cmp GR8:$rd, (load addr:$src)),
787 (outs), (ins GR16:$rd, memsrc:$src),
788 "cmp\t$src, $rd",
789 [(MSP430cmp GR16:$rd, (load addr:$src)),
793 (outs), (ins GR8:$rd, indreg:$rs), "cmp.b\t$rs, $rd", []>;
795 (outs), (ins GR16:$rd, indreg:$rs), "cmp\t$rs, $rd", []>;
798 (outs), (ins GR8:$rd, postreg:$rs), "cmp.b\t$rs, $rd", []>;
800 (outs), (ins GR16:$rd, postreg:$rs), "cmp\t$rs, $rd", []>;
836 (outs), (ins GR8:$rd, GR8:$rs),
837 "bit.b\t$rs, $rd",
838 [(MSP430cmp (and_su GR8:$rd, GR8:$rs), 0),
841 (outs), (ins GR16:$rd, GR16:$rs),
842 "bit\t$rs, $rd",
843 [(MSP430cmp (and_su GR16:$rd, GR16:$rs), 0),
847 (outs), (ins GR8:$rd, cg8imm:$imm),
848 "bit.b\t$imm, $rd",
849 [(MSP430cmp (and_su GR8:$rd, cg8imm:$imm), 0),
852 (outs), (ins GR16:$rd, cg16imm:$imm),
853 "bit\t$imm, $rd",
854 [(MSP430cmp (and_su GR16:$rd, cg16imm:$imm), 0),
858 (outs), (ins GR8:$rd, i8imm:$imm),
859 "bit.b\t$imm, $rd",
860 [(MSP430cmp (and_su GR8:$rd, imm:$imm), 0),
863 (outs), (ins GR16:$rd, i16imm:$imm),
864 "bit\t$imm, $rd",
865 [(MSP430cmp (and_su GR16:$rd, imm:$imm), 0),
869 (outs), (ins GR8:$rd, memdst:$src),
870 "bit.b\t$src, $rd",
871 [(MSP430cmp (and_su GR8:$rd, (load addr:$src)), 0),
874 (outs), (ins GR16:$rd, memdst:$src),
875 "bit\t$src, $rd",
876 [(MSP430cmp (and_su GR16:$rd, (load addr:$src)), 0),
879 def BIT8rn : I8rn<0b1011, (outs), (ins GR8:$rd, indreg:$rs),
880 "bit.b\t$rs, $rd", []>;
881 def BIT16rn : I16rn<0b1011, (outs), (ins GR16:$rd, indreg:$rs),
882 "bit\t$rs, $rd", []>;
884 def BIT8rp : I8rp<0b1011, (outs), (ins GR8:$rd, postreg:$rs),
885 "bit.b\t$rs, $rd", []>;
886 def BIT16rp : I16rp<0b1011, (outs), (ins GR16:$rd, postreg:$rs),
887 "bit\t$rs, $rd", []>;