630                                 MCRegister SrcReg, bool KillSrc) const {  in copyPhysReg()  argument
634   if (M68k::XR32RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
636   else if (M68k::XR16RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
638   else if (M68k::DR8RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
643         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
654   if (M68k::DR8RegClass.contains(SrcReg)) {  in copyPhysReg()
659   } else if (M68k::XR16RegClass.contains(SrcReg) &&  in copyPhysReg()
665         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
669   bool FromCCR = SrcReg == M68k::CCR;  in copyPhysReg()
670   bool FromSR = SrcReg == M68k::SR;  in copyPhysReg()
679     assert(M68k::DR8RegClass.contains(SrcReg) &&  in copyPhysReg()
687         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
691   LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to "  in copyPhysReg()
719 unsigned getStoreRegOpcode(unsigned SrcReg, const TargetRegisterClass *RC,  in getStoreRegOpcode()  argument
722   return getLoadStoreRegOpcode(SrcReg, RC, TRI, STI, false);  in getStoreRegOpcode()
744                                         Register SrcReg, bool IsKill,  in storeRegToStackSlot()  argument
751   unsigned Opc = getStoreRegOpcode(SrcReg, RC, TRI, Subtarget);  in storeRegToStackSlot()
755       .addReg(SrcReg, getKillRegState(IsKill));  in storeRegToStackSlot()