250                                 const CCValAssign &VA) {  in MatchingStackOffset()  argument
319   if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) {  in MatchingStackOffset()
383                                      const CCValAssign &VA,  in LowerMemArgument()  argument
392   if (VA.getLocInfo() == CCValAssign::Indirect)  in LowerMemArgument()
393     ValVT = VA.getLocVT();  in LowerMemArgument()
395     ValVT = VA.getValVT();  in LowerMemArgument()
399   int Offset = VA.getLocMemOffset();  in LowerMemArgument()
400   if (VA.getValVT() == MVT::i8) {  in LowerMemArgument()
402   } else if (VA.getValVT() == MVT::i16) {  in LowerMemArgument()
431     if (VA.getLocInfo() == CCValAssign::ZExt) {  in LowerMemArgument()
433     } else if (VA.getLocInfo() == CCValAssign::SExt) {  in LowerMemArgument()
444     return VA.isExtInLoc() ? DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val)  in LowerMemArgument()
452                                              const CCValAssign &VA,  in LowerMemOpCallTo()  argument
454   unsigned LocMemOffset = VA.getLocMemOffset();  in LowerMemOpCallTo()
595     CCValAssign &VA = ArgLocs[i];  in LowerCall()  local
596     EVT RegVT = VA.getLocVT();  in LowerCall()
601     switch (VA.getLocInfo()) {  in LowerCall()
620       SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT());  in LowerCall()
630     if (VA.isRegLoc()) {  in LowerCall()
631       RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));  in LowerCall()
633       assert(VA.isMemLoc());  in LowerCall()
639           LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags));  in LowerCall()
674       CCValAssign &VA = ArgLocs[i];  in LowerCall()  local
675       if (VA.isRegLoc())  in LowerCall()
677       assert(VA.isMemLoc());  in LowerCall()
684       int32_t Offset = VA.getLocMemOffset() + FPDiff;  in LowerCall()
685       uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8;  in LowerCall()
691         SDValue Source = DAG.getIntPtrConstant(VA.getLocMemOffset(), DL);  in LowerCall()
849     CCValAssign &VA = RVLocs[i];  in LowerCallResult()  local
850     EVT CopyVT = VA.getLocVT();  in LowerCallResult()
853     Chain = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), CopyVT, InFlag)  in LowerCallResult()
857     if (VA.isExtInLoc() && VA.getValVT().getScalarType() == MVT::i1)  in LowerCallResult()
858       Val = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Val);  in LowerCallResult()
893     CCValAssign &VA = ArgLocs[i];  in LowerFormalArguments()  local
894     assert(VA.getValNo() != LastVal && "Same value in different locations");  in LowerFormalArguments()
896     LastVal = VA.getValNo();  in LowerFormalArguments()
898     if (VA.isRegLoc()) {  in LowerFormalArguments()
899       EVT RegVT = VA.getLocVT();  in LowerFormalArguments()
906       Register Reg = MF.addLiveIn(VA.getLocReg(), RC);  in LowerFormalArguments()
912       if (VA.getLocInfo() == CCValAssign::SExt) {  in LowerFormalArguments()
914                                DAG.getValueType(VA.getValVT()));  in LowerFormalArguments()
915       } else if (VA.getLocInfo() == CCValAssign::ZExt) {  in LowerFormalArguments()
917                                DAG.getValueType(VA.getValVT()));  in LowerFormalArguments()
918       } else if (VA.getLocInfo() == CCValAssign::BCvt) {  in LowerFormalArguments()
919         ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue);  in LowerFormalArguments()
922       if (VA.isExtInLoc()) {  in LowerFormalArguments()
923         ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue);  in LowerFormalArguments()
926       assert(VA.isMemLoc());  in LowerFormalArguments()
927       ArgValue = LowerMemArgument(Chain, CCID, Ins, DL, DAG, VA, MFI, i);  in LowerFormalArguments()
932     if (VA.getLocInfo() == CCValAssign::Indirect)  in LowerFormalArguments()
934           DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, MachinePointerInfo());  in LowerFormalArguments()
1037     CCValAssign &VA = RVLocs[i];  in LowerReturn()  local
1038     assert(VA.isRegLoc() && "Can only return in registers!");  in LowerReturn()
1043     if (VA.getLocInfo() == CCValAssign::SExt)  in LowerReturn()
1044       ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy);  in LowerReturn()
1045     else if (VA.getLocInfo() == CCValAssign::ZExt)  in LowerReturn()
1046       ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy);  in LowerReturn()
1047     else if (VA.getLocInfo() == CCValAssign::AExt) {  in LowerReturn()
1049         ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy);  in LowerReturn()
1051         ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy);  in LowerReturn()
1052     } else if (VA.getLocInfo() == CCValAssign::BCvt)  in LowerReturn()
1053       ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy);  in LowerReturn()
1055     Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), ValToCopy, Flag);  in LowerReturn()
1057     RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));  in LowerReturn()
1251         CCValAssign &VA = ArgLocs[i];  in IsEligibleForTailCallOptimization()  local
1254         if (VA.getLocInfo() == CCValAssign::Indirect)  in IsEligibleForTailCallOptimization()
1256         if (!VA.isRegLoc()) {  in IsEligibleForTailCallOptimization()
1257           if (!MatchingStackOffset(Arg, VA.getLocMemOffset(), Flags, MFI, MRI,  in IsEligibleForTailCallOptimization()
1258                                    TII, VA))  in IsEligibleForTailCallOptimization()
1279         CCValAssign &VA = ArgLocs[i];  in IsEligibleForTailCallOptimization()  local
1280         if (!VA.isRegLoc())  in IsEligibleForTailCallOptimization()
1282         Register Reg = VA.getLocReg();  in IsEligibleForTailCallOptimization()