Lines Matching refs:PR
204 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeHexagonTarget() local
205 initializeHexagonBitSimplifyPass(PR); in LLVMInitializeHexagonTarget()
206 initializeHexagonConstExtendersPass(PR); in LLVMInitializeHexagonTarget()
207 initializeHexagonConstPropagationPass(PR); in LLVMInitializeHexagonTarget()
208 initializeHexagonCopyToCombinePass(PR); in LLVMInitializeHexagonTarget()
209 initializeHexagonEarlyIfConversionPass(PR); in LLVMInitializeHexagonTarget()
210 initializeHexagonGenMuxPass(PR); in LLVMInitializeHexagonTarget()
211 initializeHexagonHardwareLoopsPass(PR); in LLVMInitializeHexagonTarget()
212 initializeHexagonLoopIdiomRecognizeLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
213 initializeHexagonNewValueJumpPass(PR); in LLVMInitializeHexagonTarget()
214 initializeHexagonOptAddrModePass(PR); in LLVMInitializeHexagonTarget()
215 initializeHexagonPacketizerPass(PR); in LLVMInitializeHexagonTarget()
216 initializeHexagonRDFOptPass(PR); in LLVMInitializeHexagonTarget()
217 initializeHexagonSplitDoubleRegsPass(PR); in LLVMInitializeHexagonTarget()
218 initializeHexagonVectorCombineLegacyPass(PR); in LLVMInitializeHexagonTarget()
219 initializeHexagonVectorLoopCarriedReuseLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
220 initializeHexagonVExtractPass(PR); in LLVMInitializeHexagonTarget()