Lines Matching refs:su
339 for (unsigned su = 0, e = DAG->SUnits.size(); su != e; ++su) { in apply() local
341 if (DAG->SUnits[su].getInstr()->isCall()) in apply()
342 LastSequentialCall = &DAG->SUnits[su]; in apply()
344 else if (DAG->SUnits[su].getInstr()->isCompare() && LastSequentialCall) in apply()
345 DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier)); in apply()
347 else if (SchedPredsCloser && LastSequentialCall && su > 1 && su < e-1 && in apply()
348 shouldTFRICallBind(HII, DAG->SUnits[su], DAG->SUnits[su+1])) in apply()
349 DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier)); in apply()
365 const MachineInstr *MI = DAG->SUnits[su].getInstr(); in apply()
378 LastVRegUse[VRegHoldingReg[MO.getReg()]] = &DAG->SUnits[su]; in apply()
383 LastVRegUse[*AI] != &DAG->SUnits[su]) in apply()
385 DAG->addEdge(&DAG->SUnits[su], SDep(LastVRegUse[*AI], SDep::Barrier)); in apply()