164 HexagonTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG)  in LowerINTRINSIC_WO_CHAIN()
185 HexagonTargetLowering::CanLowerReturn(  in CanLowerReturn()
201 HexagonTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,  in LowerReturn()
263 bool HexagonTargetLowering::mayBeEmittedAsTailCall(const CallInst *CI) const {  in mayBeEmittedAsTailCall()
268 Register HexagonTargetLowering::getRegisterByName(  in getRegisterByName()
349 SDValue HexagonTargetLowering::LowerCallResult(  in LowerCallResult()
403 HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,  in LowerCall()
628 bool HexagonTargetLowering::getPostIndexedAddressParts(SDNode *N, SDNode *Op,  in getPostIndexedAddressParts()
658 HexagonTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {  in LowerINLINEASM()
706 SDValue HexagonTargetLowering::LowerPREFETCH(SDValue Op,  in LowerPREFETCH()
721 SDValue HexagonTargetLowering::LowerREADCYCLECOUNTER(SDValue Op,  in LowerREADCYCLECOUNTER()
729 SDValue HexagonTargetLowering::LowerINTRINSIC_VOID(SDValue Op,  in LowerINTRINSIC_VOID()
744 HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,  in LowerDYNAMIC_STACKALLOC()
774 SDValue HexagonTargetLowering::LowerFormalArguments(  in LowerFormalArguments()
945 HexagonTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {  in LowerVASTART()
1012 HexagonTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {  in LowerVACOPY()
1029 SDValue HexagonTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {  in LowerSETCC()
1089 HexagonTargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {  in LowerVSELECT()
1112 HexagonTargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {  in LowerConstantPool()
1155 HexagonTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {  in LowerJumpTable()
1168 HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const {  in LowerRETURNADDR()
1194 HexagonTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {  in LowerFRAMEADDR()
1211 HexagonTargetLowering::LowerATOMIC_FENCE(SDValue Op, SelectionDAG& DAG) const {  in LowerATOMIC_FENCE()
1217 HexagonTargetLowering::LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const {  in LowerGLOBALADDRESS()
1251 HexagonTargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {  in LowerBlockAddress()
1267 HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG)  in LowerGLOBAL_OFFSET_TABLE()
1276 HexagonTargetLowering::GetDynamicTLSAddr(SelectionDAG &DAG, SDValue Chain,  in GetDynamicTLSAddr()
1313 HexagonTargetLowering::LowerToTLSInitialExecModel(GlobalAddressSDNode *GA,  in LowerToTLSInitialExecModel()
1355 HexagonTargetLowering::LowerToTLSLocalExecModel(GlobalAddressSDNode *GA,  in LowerToTLSLocalExecModel()
1377 HexagonTargetLowering::LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,  in LowerToTLSGeneralDynamicModel()
1413 HexagonTargetLowering::LowerGlobalTLSAddress(SDValue Op,  in LowerGlobalTLSAddress()
1433 HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,  in HexagonTargetLowering()  function in HexagonTargetLowering
1877 const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
1929 HexagonTargetLowering::validateConstPtrAlignment(SDValue Ptr, Align NeedAlign,  in validateConstPtrAlignment()
1968 HexagonTargetLowering::replaceMemWithUndef(SDValue Op, SelectionDAG &DAG)  in replaceMemWithUndef()
2060 bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,  in getTgtMemIntrinsic()
2119 bool HexagonTargetLowering::hasBitTest(SDValue X, SDValue Y) const {  in hasBitTest()
2123 bool HexagonTargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {  in isTruncateFree()
2127 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {  in isTruncateFree()
2133 bool HexagonTargetLowering::isFMAFasterThanFMulAndFAdd(  in isFMAFasterThanFMulAndFAdd()
2139 bool HexagonTargetLowering::shouldExpandBuildVectorWithShuffles(EVT VT,  in shouldExpandBuildVectorWithShuffles()
2144 bool HexagonTargetLowering::isShuffleMaskLegal(ArrayRef<int> Mask,  in isShuffleMaskLegal()
2150 HexagonTargetLowering::getPreferredVectorAction(MVT VT) const {  in getPreferredVectorAction()
2176 HexagonTargetLowering::getBaseAndOffset(SDValue Addr) const {  in getBaseAndOffset()
2188 HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG)  in LowerVECTOR_SHUFFLE()
2314 HexagonTargetLowering::getVectorShiftByInt(SDValue Op, SelectionDAG &DAG)  in getVectorShiftByInt()
2347 HexagonTargetLowering::LowerVECTOR_SHIFT(SDValue Op, SelectionDAG &DAG) const {  in LowerVECTOR_SHIFT()
2352 HexagonTargetLowering::LowerROTL(SDValue Op, SelectionDAG &DAG) const {  in LowerROTL()
2359 HexagonTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {  in LowerBITCAST()
2380 HexagonTargetLowering::getBuildVectorConstInts(ArrayRef<SDValue> Values,  in getBuildVectorConstInts()
2410 HexagonTargetLowering::buildVector32(ArrayRef<SDValue> Elem, const SDLoc &dl,  in buildVector32()
2501 HexagonTargetLowering::buildVector64(ArrayRef<SDValue> Elem, const SDLoc &dl,  in buildVector64()
2562 HexagonTargetLowering::extractVector(SDValue VecV, SDValue IdxV,  in extractVector()
2662 HexagonTargetLowering::insertVector(SDValue VecV, SDValue ValV, SDValue IdxV,  in insertVector()
2728 HexagonTargetLowering::expandPredicate(SDValue Vec32, const SDLoc &dl,  in expandPredicate()
2737 HexagonTargetLowering::contractPredicate(SDValue Vec64, const SDLoc &dl,  in contractPredicate()
2746 HexagonTargetLowering::getZero(const SDLoc &dl, MVT Ty, SelectionDAG &DAG)  in getZero()
2763 HexagonTargetLowering::appendUndef(SDValue Val, MVT ResTy, SelectionDAG &DAG)  in appendUndef()
2785 HexagonTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {  in LowerBUILD_VECTOR()
2839 HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op,  in LowerCONCAT_VECTORS()
2903 HexagonTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,  in LowerEXTRACT_VECTOR_ELT()
2911 HexagonTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,  in LowerEXTRACT_SUBVECTOR()
2918 HexagonTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,  in LowerINSERT_VECTOR_ELT()
2925 HexagonTargetLowering::LowerINSERT_SUBVECTOR(SDValue Op,  in LowerINSERT_SUBVECTOR()
2933 HexagonTargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {  in allowTruncateForTailCall()
2946 HexagonTargetLowering::LowerLoad(SDValue Op, SelectionDAG &DAG) const {  in LowerLoad()
2978 HexagonTargetLowering::LowerStore(SDValue Op, SelectionDAG &DAG) const {  in LowerStore()
3008 HexagonTargetLowering::LowerUnalignedLoad(SDValue Op, SelectionDAG &DAG)  in LowerUnalignedLoad()
3096 HexagonTargetLowering::LowerUAddSubO(SDValue Op, SelectionDAG &DAG) const {  in LowerUAddSubO()
3133 HexagonTargetLowering::LowerAddSubCarry(SDValue Op, SelectionDAG &DAG) const {  in LowerAddSubCarry()
3151 HexagonTargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {  in LowerEH_RETURN()
3178 HexagonTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {  in LowerOperation()
3243 HexagonTargetLowering::LowerOperationWrapper(SDNode *N,  in LowerOperationWrapper()
3262 HexagonTargetLowering::ReplaceNodeResults(SDNode *N,  in ReplaceNodeResults()
3292 HexagonTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)  in PerformDAGCombine()
3337 HexagonTargetLowering::getPICJumpTableRelocBase(SDValue Table,  in getPICJumpTableRelocBase()
3350 HexagonTargetLowering::getConstraintType(StringRef Constraint) const {  in getConstraintType()
3368 HexagonTargetLowering::getRegForInlineAsmConstraint(  in getRegForInlineAsmConstraint()
3426 bool HexagonTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,  in isFPImmLegal()
3433 bool HexagonTargetLowering::isLegalAddressingMode(const DataLayout &DL,  in isLegalAddressingMode()
3471 bool HexagonTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA)  in isOffsetFoldingLegal()
3480 bool HexagonTargetLowering::isLegalICmpImmediate(int64_t Imm) const {  in isLegalICmpImmediate()
3487 bool HexagonTargetLowering::IsEligibleForTailCallOptimization(  in IsEligibleForTailCallOptimization()
3549 EVT HexagonTargetLowering::getOptimalMemOpType(  in getOptimalMemOpType()
3560 bool HexagonTargetLowering::allowsMemoryAccess(  in allowsMemoryAccess()
3570 bool HexagonTargetLowering::allowsMisalignedMemoryAccesses(  in allowsMisalignedMemoryAccesses()
3582 HexagonTargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI,  in findRepresentativeClass()
3599 bool HexagonTargetLowering::shouldReduceLoadWidth(SDNode *Load,  in shouldReduceLoadWidth()
3618 Value *HexagonTargetLowering::emitLoadLinked(IRBuilderBase &Builder,  in emitLoadLinked()
3641 Value *HexagonTargetLowering::emitStoreConditional(IRBuilderBase &Builder,  in emitStoreConditional()
3666 HexagonTargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {  in shouldExpandAtomicLoadInIR()
3674 HexagonTargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {  in shouldExpandAtomicStoreInIR()
3682 HexagonTargetLowering::shouldExpandAtomicCmpXchgInIR(  in shouldExpandAtomicCmpXchgInIR()