Lines Matching refs:FB

457   MachineBasicBlock *TB = nullptr, *FB = nullptr;  in findInductionRegister()  local
458 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in findInductionRegister()
618 MachineBasicBlock *TB = nullptr, *FB = nullptr; in getLoopTripCount() local
619 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in getLoopTripCount()
628 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in getLoopTripCount()
637 FB = (LTB == Header) ? LTB: LFB; in getLoopTripCount()
639 assert ((!FB || TB == Header || FB == Header) && "Branches not to header?"); in getLoopTripCount()
640 if (!TB || (FB && TB != Header && FB != Header)) in getLoopTripCount()
1219 MachineBasicBlock *TB = nullptr, *FB = nullptr; in convertToHardwareLoop() local
1222 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false)) in convertToHardwareLoop()
1227 else if (L->contains(FB)) in convertToHardwareLoop()
1228 LoopStart = FB; in convertToHardwareLoop()
1641 MachineBasicBlock *TB = nullptr, *FB = nullptr; in fixupInductionVariable() local
1644 bool NotAnalyzed = TII->analyzeBranch(*ExitingBlock, TB, FB, Cond, false); in fixupInductionVariable()
1648 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) { in fixupInductionVariable()
1660 FB = (LTB == Header) ? LTB : LFB; in fixupInductionVariable()
1663 if (FB != Header) { in fixupInductionVariable()
1673 if (MDT->dominates(TB, FB)) in fixupInductionVariable()
1861 MachineBasicBlock *TB = nullptr, *FB = nullptr; in createPreheaderForLoop() local
1863 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false)) in createPreheaderForLoop()
1867 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false); in createPreheaderForLoop()
1946 TB = FB = nullptr; in createPreheaderForLoop()
1951 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp2, false); in createPreheaderForLoop()
1954 if (TB != Header && (Tmp2.empty() || FB != Header)) in createPreheaderForLoop()
1962 TB = FB = nullptr; in createPreheaderForLoop()
1963 bool LatchNotAnalyzed = TII->analyzeBranch(*Latch, TB, FB, Tmp2, false); in createPreheaderForLoop()
1966 if (!TB && !FB) in createPreheaderForLoop()