Lines Matching refs:PredR
223 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond);
230 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
747 MachineBasicBlock::iterator UseIt, unsigned PredR, bool Cond) { in getReachingDefForPred() argument
760 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred()
770 if (RR.Reg == PredR) { in getReachingDefForPred()
910 unsigned PredR, bool Cond, MachineBasicBlock::iterator First, in renameInRange() argument
919 if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(*MI))) in renameInRange()
959 Register PredR = MP.getReg(); in predicate() local
960 MachineInstr *DefI = getReachingDefForPred(RT, TfrI, PredR, Cond); in predicate()
977 if (!I->modifiesRegister(PredR, nullptr)) in predicate()
990 if (PredValid && HII->isPredicated(*MI) && MI->readsRegister(PredR)) in predicate()
1060 renameInRange(RT, RD, PredR, Cond, PastDefIt, TfrIt); in predicate()