165     const HexagonInstrInfo *HII = nullptr;  member in __anon5c30da9c0111::HexagonExpandCondsets
344       if (HII->isPredicated(*DefI))  in updateKillFlags()
422     if (HII->isPredicated(*DefI))  in updateDeadsInRange()
492     if (!HII->isPredicated(*DefI))  in updateDeadsInRange()
647     MIB = BuildMI(B, At, DL, HII->get(Opc))  in genCondTfrFor()
652     MIB = BuildMI(B, At, DL, HII->get(Opc))  in genCondTfrFor()
696       MI.setDesc(HII->get(TargetOpcode::COPY));  in split()
724   if (HII->isPredicated(*MI) || !HII->isPredicable(*MI))  in isPredicable()
759     if (PredValid && HII->isPredicated(*MI)) {  in getReachingDefForPred()
760       if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI)))  in getReachingDefForPred()
826   if (HII->areMemAccessesTriviallyDisjoint(TheI, ToI))  in canMoveMemTo()
874   unsigned PredOpc = HII->getCondOpcode(Opc, !Cond);  in predicateAt()
875   MachineInstrBuilder MB = BuildMI(B, Where, DL, HII->get(PredOpc));  in predicateAt()
917     if (!HII->isPredicated(*MI))  in renameInRange()
919     if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(*MI)))  in renameInRange()
990     if (PredValid && HII->isPredicated(*MI) && MI->readsRegister(PredR))  in predicate()
991       Exec = (Cond == HII->isPredicatedTrue(*MI)) ? Exec_Then : Exec_Else;  in predicate()
1225       if (!RDef || !HII->isPredicable(*RDef)) {  in coalesceSegments()
1236       if (!RDef || !HII->isPredicable(*RDef)) {  in coalesceSegments()
1253   HII = static_cast<const HexagonInstrInfo*>(MF.getSubtarget().getInstrInfo());  in runOnMachineFunction()