Lines Matching refs:rd

372 let isCommutable = 1, Constraints = "$src = $rd", Defs = [SREG] in {
378 : $rd),
382 "add\t$rd, $rr",
384 : $rd, (add i8
397 : $rd),
401 "addw\t$rd, $rr",
403 : $rd, (add i16
413 : $rd),
417 "adc\t$rd, $rr",
419 : $rd, (adde i8
432 : $rd),
436 "adcw\t$rd, $rr", [
438 : $rd, (adde i16
449 : $rd),
453 "adiw\t$rd, $k",
455 : $rd, (add i16
465 let Constraints = "$src = $rd", Defs = [SREG] in {
471 : $rd),
475 "sub\t$rd, $rr",
477 : $rd, (sub i8
490 : $rd),
494 "subw\t$rd, $rr",
496 : $rd, (sub i16
504 : $rd),
508 "subi\t$rd, $k",
510 : $rd, (sub i8
522 : $rd),
526 "subiw\t$rd, $rr",
528 : $rd, (sub i16
536 : $rd),
540 "sbiw\t$rd, $k",
542 : $rd, (sub i16
553 : $rd),
557 "sbc\t$rd, $rr",
559 : $rd, (sube i8
570 : $rd),
574 "sbcw\t$rd, $rr", [
576 : $rd, (sube i16
585 : $rd),
589 "sbci\t$rd, $k",
591 : $rd, (sube i8
600 : $rd),
604 "sbciw\t$rd, $rr", [
606 : $rd, (sube i16
617 let Constraints = "$src = $rd", Defs = [SREG] in {
621 : $rd),
624 "inc\t$rd", [(set i8
625 : $rd, (add i8
632 : $rd),
635 "dec\t$rd", [(set i8
636 : $rd, (add i8
705 let Constraints = "$src = $rd", Defs = [SREG] in {
712 : $rd),
716 "and\t$rd, $rr",
718 : $rd, (and i8
729 : $rd),
733 "andw\t$rd, $rr", [
735 : $rd, (and i16
744 : $rd),
748 "or\t$rd, $rr",
750 : $rd, (or i8
761 : $rd),
765 "orw\t$rd, $rr", [
767 : $rd, (or i16
776 : $rd),
780 "eor\t$rd, $rr",
782 : $rd, (xor i8
793 : $rd),
797 "eorw\t$rd, $rr", [
799 : $rd, (xor i16
809 : $rd),
813 "andi\t$rd, $k",
815 : $rd, (and i8
827 : $rd),
831 "andiw\t$rd, $k",
833 : $rd, (and i16
841 : $rd),
845 "ori\t$rd, $k",
847 : $rd, (or i8
859 : $rd),
863 "oriw\t$rd, $rr",
865 : $rd, (or i16
874 let Constraints = "$src = $rd", Defs = [SREG] in {
878 : $rd),
881 "com\t$rd", [(set i8
882 : $rd, (not i8
892 : $rd),
895 "comw\t$rd",
897 : $rd, (not i16
904 : $rd),
907 "neg\t$rd", [(set i8
908 : $rd, (ineg i8
919 : $rd),
922 "negw\t$rd",
924 : $rd, (ineg i16
932 def : InstAlias<"tst\t$rd", (ANDRdRr GPR8 : $rd, GPR8 : $rd)>;
938 def : InstAlias<"sbr\t$rd, $k",
940 : $rd, imm_ldi8
1020 : $rd, GPR8
1022 "cpse\t$rd, $rr", []>;
1027 : $rd, GPR8
1029 "cp\t$rd, $rr", [(AVRcmp i8
1030 : $rd, i8
1052 : $rd, GPR8
1054 "cpc\t$rd, $rr", [(AVRcmpc i8
1055 : $rd, i8
1080 : $rd, imm_ldi8
1082 "cpi\t$rd, $k", [(AVRcmp i8
1083 : $rd, imm
1242 : $rd),
1245 "mov\t$rd, $rr", []>;
1259 : $rd),
1262 "ldi\t$rd, $k", [(set i8
1263 : $rd, imm
1284 : $rd),
1287 "lds\t$rd, $k", [(set i8
1288 : $rd, (load imm
1437 : $rd),
1441 : $rd, (Op i16
1447 : $rd, DRC
1450 : $rd, DRC
1454 : Pseudo<(outs DRC:$rd),
1456 "atomic_op", [(set DRC:$rd, (Op i16:$rr, DRC:$operand))]>;
1495 : $rd),
1496 "sts\t$k, $rd", [(store i8
1497 : $rd, imm
1812 : $rd),
1815 "xch\t$z, $rd", []>,
1820 : $rd),
1823 "las\t$z, $rd", []>,
1828 : $rd),
1831 "lac\t$z, $rd", []>,
1836 : $rd),
1839 "lat\t$z, $rd", []>,
1847 let Constraints = "$src = $rd", Defs = [SREG] in {
1851 : $rd),
1854 "lslw\t$rd",
1856 : $rd, (AVRlsl i16
1860 def LSLWHiRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "lslwhi\t$rd",
1861 [(set i16:$rd, (AVRlslhi i16:$src)), (implicit SREG)]>;
1864 : $rd),
1868 "lslwn\t$rd, $bits", [
1870 : $rd, (AVRlslwn i16
1877 : $rd),
1881 "lslbn\t$rd, $bits", [
1883 : $rd, (AVRlslbn i8
1892 : $rd),
1895 "lsr\t$rd", [(set i8
1896 : $rd, (AVRlsr i8
1901 : $rd),
1904 "lsrw\t$rd",
1906 : $rd, (AVRlsr i16
1910 def LSRWLoRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "lsrwlo\t$rd",
1911 [(set i16:$rd, (AVRlsrlo i16:$src)), (implicit SREG)]>;
1914 : $rd),
1918 "lsrwn\t$rd, $bits", [
1920 : $rd, (AVRlsrwn i16
1927 : $rd),
1931 "lsrbn\t$rd, $bits", [
1933 : $rd, (AVRlsrbn i8
1942 : $rd),
1945 "asr\t$rd", [(set i8
1946 : $rd, (AVRasr i8
1951 : $rd),
1955 "asrwn\t$rd, $bits", [
1957 : $rd, (AVRasrwn i16
1964 : $rd),
1968 "asrbn\t$rd, $bits", [
1970 : $rd, (AVRasrbn i8
1977 : $rd),
1980 "asrw\t$rd",
1982 : $rd, (AVRasr i16
1986 def ASRWLoRd : Pseudo<(outs DREGS:$rd), (ins DREGS:$src), "asrwlo\t$rd",
1987 [(set i16:$rd, (AVRasrlo i16:$src)), (implicit SREG)]>;
1990 : $rd),
1993 "rolb\t$rd",
1995 : $rd, (AVRrol i8
2000 : $rd),
2003 "rorb\t$rd",
2005 : $rd, (AVRror i8
2014 : $rd),
2017 "rolw\t$rd",
2019 : $rd, (AVRrol i16
2025 : $rd),
2028 "ror\t$rd", []>;
2032 : $rd),
2035 "rorw\t$rd",
2037 : $rd, (AVRror i16
2046 "$src = $rd" in def SWAPRd : FRd<0b1001, 0b0100010,
2048 : $rd),
2051 "swap\t$rd", [(set i8
2052 : $rd, (AVRSwap i8
2083 : $rd, i8imm
2085 "bst\t$rd, $b", []>;
2087 let Constraints = "$src = $rd",
2090 : $rd),
2094 "bld\t$rd, $b", []>;
2096 def CBR : InstAlias<"cbr\t$rd, $k", (ANDIRdK LD8 : $rd, imm_com8 : $k), 0>;
2102 def CLR : InstAlias<"clr\t$rd", (EORRdRr GPR8 : $rd, GPR8 : $rd)>;
2108 def LSL : InstAlias<"lsl\t$rd", (ADDRdRr GPR8 : $rd, GPR8 : $rd)>;
2110 def ROL : InstAlias<"rol\t$rd", (ADCRdRr GPR8 : $rd, GPR8 : $rd)>;
2116 def : InstAlias<"ser\t$rd", (LDIRdK LD8 : $rd, 0xff), 0>;
2390 def CopyR1 : Pseudo<(outs GPR8:$rd), (ins), "clrz\t$rd", [(set i8:$rd, 0)]>;
2523 def : Pat<(AVRtst i8 : $rd), (ANDRdRr GPR8 : $rd, GPR8 : $rd)>;
2527 def : Pat<(AVRlsl i8 : $rd), (ADDRdRr GPR8 : $rd, GPR8 : $rd)>;