Lines Matching refs:TII
57 const AVRInstrInfo &TII = *STI.getInstrInfo(); in emitPrologue() local
63 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
71 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
78 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
104 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
120 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitPrologue()
128 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
140 const AVRInstrInfo &TII = *STI.getInstrInfo(); in restoreStatusRegister() local
145 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in restoreStatusRegister()
146 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr)) in restoreStatusRegister()
149 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0); in restoreStatusRegister()
171 const AVRInstrInfo &TII = *STI.getInstrInfo(); in emitEpilogue() local
203 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitEpilogue()
211 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
245 const TargetInstrInfo &TII = *STI.getInstrInfo(); in spillCalleeSavedRegisters() local
263 BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr)) in spillCalleeSavedRegisters()
284 const TargetInstrInfo &TII = *STI.getInstrInfo(); in restoreCalleeSavedRegisters() local
292 BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg); in restoreCalleeSavedRegisters()
302 const TargetInstrInfo &TII) { in fixStackStores() argument
323 MI.setDesc(TII.get(STOpc)); in fixStackStores()
332 const AVRInstrInfo &TII = *STI.getInstrInfo(); in eliminateCallFramePseudoInstr() local
340 int Amount = TII.getFrameSize(*MI); in eliminateCallFramePseudoInstr()
348 if (Opcode == TII.getCallFrameSetupOpcode()) { in eliminateCallFramePseudoInstr()
354 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
357 BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30) in eliminateCallFramePseudoInstr()
362 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30); in eliminateCallFramePseudoInstr()
366 fixStackStores(MBB, MI, TII); in eliminateCallFramePseudoInstr()
368 assert(Opcode == TII.getCallFrameDestroyOpcode()); in eliminateCallFramePseudoInstr()
385 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
387 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AddOpcode), AVR::R31R30) in eliminateCallFramePseudoInstr()
392 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()