Lines Matching refs:DstIsDead
163 bool DstIsDead = MI.getOperand(0).isDead(); in expandArith() local
171 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
177 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
196 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogic() local
205 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
214 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
243 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogicImm() local
254 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
265 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
297 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
304 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
309 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
351 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
363 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
372 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
416 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
425 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
433 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
448 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
456 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
463 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
469 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
554 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
561 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)); in expand()
565 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)); in expand()
605 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
612 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)); in expand()
616 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)); in expand()
701 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
711 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
717 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
734 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
744 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
750 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1095 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1111 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1130 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1146 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1255 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1266 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1271 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1365 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1375 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1381 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1425 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1434 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1440 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1459 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1467 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1482 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSLW4Rd() local
1490 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1493 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1499 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1508 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1517 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1526 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW4Rd()
1540 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSLW8Rd() local
1547 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW8Rd()
1553 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW8Rd()
1567 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSLW12Rd() local
1574 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW12Rd()
1579 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW12Rd()
1585 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW12Rd()
1594 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLW12Rd()
1626 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1635 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1640 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1658 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1666 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1680 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSRW4Rd() local
1688 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1691 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1697 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1706 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1715 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1724 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW4Rd()
1738 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSRW8Rd() local
1745 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW8Rd()
1751 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW8Rd()
1765 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSRW12Rd() local
1772 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW12Rd()
1777 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW12Rd()
1783 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW12Rd()
1792 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRW12Rd()
1836 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1845 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1850 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1868 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
1876 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
1890 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRW7Rd() local
1902 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW7Rd()
1908 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW7Rd()
1913 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW7Rd()
1920 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW7Rd()
1937 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRW8Rd() local
1944 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW8Rd()
1949 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW8Rd()
1956 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW8Rd()
1972 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRW14Rd() local
1985 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW14Rd()
1991 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW14Rd()
1997 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW14Rd()
2003 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW14Rd()
2009 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW14Rd()
2026 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRW15Rd() local
2043 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW15Rd()
2053 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRW15Rd()
2082 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSLB7Rd() local
2091 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLB7Rd()
2097 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLB7Rd()
2103 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSLB7Rd()
2132 bool DstIsDead = MI.getOperand(0).isDead(); in expandLSRB7Rd() local
2141 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRB7Rd()
2148 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRB7Rd()
2154 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLSRB7Rd()
2184 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRB6Rd() local
2199 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRB6Rd()
2204 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRB6Rd()
2209 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRB6Rd()
2222 bool DstIsDead = MI.getOperand(0).isDead(); in expandASRB7Rd() local
2230 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRB7Rd()
2236 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandASRB7Rd()
2283 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
2290 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
2308 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
2335 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
2342 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
2348 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
2364 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
2372 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
2378 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()