360                                           Register FrameReg, int &Offset,  in rewriteFrameIndex()  argument
377     emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,  in rewriteFrameIndex()
387     unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5;  in rewriteFrameIndex()
400       Register DestReg = FrameReg;  in rewriteFrameIndex()
404       if (ARM::hGPRRegClass.contains(FrameReg) && FrameReg != ARM::SP) {  in rewriteFrameIndex()
407             .addReg(FrameReg)  in rewriteFrameIndex()
417       if (NewOpc != Opcode && FrameReg != ARM::SP)  in rewriteFrameIndex()
477   Register FrameReg;  in eliminateFrameIndex()  local
480   int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);  in eliminateFrameIndex()
487   if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){  in eliminateFrameIndex()
499     MI.getOperand(FIOperandNum).  ChangeToRegister(FrameReg, false /*isDef*/);  in eliminateFrameIndex()
507   if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))  in eliminateFrameIndex()
527       if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
528         emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,  in eliminateFrameIndex()
532         if (!ARM::hGPRRegClass.contains(FrameReg)) {  in eliminateFrameIndex()
539               .addReg(FrameReg)  in eliminateFrameIndex()
544       emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
551       assert(!ARM::hGPRRegClass.contains(FrameReg) &&  in eliminateFrameIndex()
555       MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()
563         if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
564           emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,  in eliminateFrameIndex()
568           if (!ARM::hGPRRegClass.contains(FrameReg)) {  in eliminateFrameIndex()
575                 .addReg(FrameReg)  in eliminateFrameIndex()
580         emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
585         assert(!ARM::hGPRRegClass.contains(FrameReg) &&  in eliminateFrameIndex()
589         MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()