Lines Matching refs:getOperand

103          MI->getOperand(1).getReg().isVirtual())  in INITIALIZE_PASS_DEPENDENCY()
104 MI = MRI->getVRegDef(MI->getOperand(1).getReg()); in INITIALIZE_PASS_DEPENDENCY()
124 if (T.getOpcode() == ARM::t2LoopEnd && T.getOperand(1).getMBB() == Header) { in findLoopComponents()
129 T.getOperand(2).getMBB() == Header) { in findLoopComponents()
153 LookThroughCOPY(MRI->getVRegDef(LoopEnd->getOperand(0).getReg()), MRI); in findLoopComponents()
162 LookThroughCOPY(MRI->getVRegDef(LoopDec->getOperand(1).getReg()), MRI); in findLoopComponents()
165 (LoopPhi->getOperand(2).getMBB() != Latch && in findLoopComponents()
166 LoopPhi->getOperand(4).getMBB() != Latch)) { in findLoopComponents()
172 Register StartReg = LoopPhi->getOperand(2).getMBB() == Latch in findLoopComponents()
173 ? LoopPhi->getOperand(3).getReg() in findLoopComponents()
174 : LoopPhi->getOperand(1).getReg(); in findLoopComponents()
195 MIB.add(MI->getOperand(0)); in RevertWhileLoopSetup()
196 MIB.add(MI->getOperand(1)); in RevertWhileLoopSetup()
207 MIB.add(MI->getOperand(1)); // branch target in RevertWhileLoopSetup()
239 Register LR = LoopStart->getOperand(0).getReg(); in LowerWhileLoopStart()
253 .add(LoopStart->getOperand(1)) in LowerWhileLoopStart()
254 .add(WLSIt->getOperand(1)); in LowerWhileLoopStart()
295 MIB.add(LoopStart->getOperand(0)); in CheckForLRUseInPredecessors()
296 MIB.add(LoopStart->getOperand(1)); in CheckForLRUseInPredecessors()
299 LoopStart->getOperand(1).setIsKill(false); in CheckForLRUseInPredecessors()
356 Register PhiReg = LoopPhi->getOperand(0).getReg(); in MergeLoopEnd()
357 Register DecReg = LoopDec->getOperand(0).getReg(); in MergeLoopEnd()
358 Register StartReg = LoopStart->getOperand(0).getReg(); in MergeLoopEnd()
372 !MI.getOperand(0).getReg().isVirtual()) { in MergeLoopEnd()
376 Worklist.push_back(MI.getOperand(0).getReg()); in MergeLoopEnd()
399 if (LoopPhi->getOperand(2).getMBB() == ML->getLoopLatch()) { in MergeLoopEnd()
400 LoopPhi->getOperand(3).setReg(StartReg); in MergeLoopEnd()
401 LoopPhi->getOperand(1).setReg(DecReg); in MergeLoopEnd()
403 LoopPhi->getOperand(1).setReg(StartReg); in MergeLoopEnd()
404 LoopPhi->getOperand(3).setReg(DecReg); in MergeLoopEnd()
423 .add(LoopEnd->getOperand(1)); in MergeLoopEnd()
472 VCTP->getOperand(0).getReg() != FirstVCTP->getOperand(0).getReg()) { in ConvertTailPredLoop()
488 Register CountReg = FirstVCTP->getOperand(1).getReg(); in ConvertTailPredLoop()
496 (Phi->getOperand(2).getMBB() != ML->getLoopLatch() && in ConvertTailPredLoop()
497 Phi->getOperand(4).getMBB() != ML->getLoopLatch())) { in ConvertTailPredLoop()
501 CountReg = Phi->getOperand(2).getMBB() == ML->getLoopLatch() in ConvertTailPredLoop()
502 ? Phi->getOperand(3).getReg() in ConvertTailPredLoop()
503 : Phi->getOperand(1).getReg(); in ConvertTailPredLoop()
511 MRI->use_instructions(LoopStart->getOperand(0).getReg())) in ConvertTailPredLoop()
523 .add(LoopStart->getOperand(0)) in ConvertTailPredLoop()
524 .add(LoopStart->getOperand(1)) in ConvertTailPredLoop()
527 MI.add(LoopStart->getOperand(2)); in ConvertTailPredLoop()
536 Register LR = LoopPhi->getOperand(0).getReg(); in ConvertTailPredLoop()
539 MI->getOperand(Idx + 2).setReg(LR); in ConvertTailPredLoop()
576 return ARMCC::CondCodes(Instr.getOperand(3).getImm()); in GetCondCode()
588 MachineOperand &CondOP1 = Cond.getOperand(1), &CondOP2 = Cond.getOperand(2); in IsVPNOTEquivalent()
589 MachineOperand &PrevOP1 = Prev.getOperand(1), &PrevOP2 = Prev.getOperand(2); in IsVPNOTEquivalent()
610 MachineOperand &Dst = Instr.getOperand(0); in IsWritingToVCCR()
661 Register VPNOTResult = VPNOT.getOperand(0).getReg(); in MoveVPNOTBeforeFirstUser()
662 Register VPNOTOperand = VPNOT.getOperand(1).getReg(); in MoveVPNOTBeforeFirstUser()
729 Register Dst = Iter->getOperand(0).getReg(); in ReduceOldVCCRValueUses()
773 Register Result = Iter->getOperand(0).getReg(); in ReduceOldVCCRValueUses()
787 LastVPNOTResult = VPNOT.getOperand(0).getReg(); in ReduceOldVCCRValueUses()
818 Register VPNOTOperand = Iter->getOperand(1).getReg(); in ReduceOldVCCRValueUses()
824 LastVPNOTResult = Iter->getOperand(0).getReg(); in ReduceOldVCCRValueUses()
859 PrevVCMP->getOperand(0).getReg(), /*isKill*/ true)) { in ReplaceVCMPsByVPNOTs()
885 Register PrevVCMPResultReg = PrevVCMP->getOperand(0).getReg(); in ReplaceVCMPsByVPNOTs()
890 .add(Instr.getOperand(0)) in ReplaceVCMPsByVPNOTs()
931 Register VPR = Instr.getOperand(PIdx + 1).getReg(); in ReplaceConstByVPNOTs()
938 !Copy->getOperand(1).getReg().isVirtual() || in ReplaceConstByVPNOTs()
939 MRI->getRegClass(Copy->getOperand(1).getReg()) == &ARM::VCCRRegClass) { in ReplaceConstByVPNOTs()
943 Register GPR = Copy->getOperand(1).getReg(); in ReplaceConstByVPNOTs()
950 return Def->getOperand(1).getImm(); in ReplaceConstByVPNOTs()
961 Instr.getOperand(PIdx + 1).setReg(LastVPTReg); in ReplaceConstByVPNOTs()
978 Instr.getOperand(PIdx + 1).setReg(NewVPR); in ReplaceConstByVPNOTs()
1019 .add(MI.getOperand(0)) in ConvertVPSEL()
1020 .add(MI.getOperand(1)) in ConvertVPSEL()
1021 .add(MI.getOperand(1)) in ConvertVPSEL()
1023 .add(MI.getOperand(4)) in ConvertVPSEL()
1024 .add(MI.getOperand(5)) in ConvertVPSEL()
1025 .add(MI.getOperand(2)); in ConvertVPSEL()
1046 Register R = MI.getOperand(1).getReg(); in HintDoLoopStartReg()