Lines Matching refs:getReg
111 printRegName(O, Dst.getReg()); in printInst()
113 printRegName(O, MO1.getReg()); in printInst()
116 printRegName(O, MO2.getReg()); in printInst()
133 printRegName(O, Dst.getReg()); in printInst()
135 printRegName(O, MO1.getReg()); in printInst()
151 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
165 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
170 printRegName(O, MI->getOperand(1).getReg()); in printInst()
180 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
194 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
199 printRegName(O, MI->getOperand(0).getReg()); in printInst()
209 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
222 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
234 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
236 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
265 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
316 unsigned Reg = Op.getReg(); in printOperand()
403 printRegName(O, MO1.getReg()); in printSORegRegOperand()
412 printRegName(O, MO2.getReg()); in printSORegRegOperand()
422 printRegName(O, MO1.getReg()); in printSORegImmOperand()
441 printRegName(O, MO1.getReg()); in printAM2PreOrOffsetIndexOp()
443 if (!MO2.getReg()) { in printAM2PreOrOffsetIndexOp()
455 printRegName(O, MO2.getReg()); in printAM2PreOrOffsetIndexOp()
468 printRegName(O, MO1.getReg()); in printAddrModeTBB()
470 printRegName(O, MO2.getReg()); in printAddrModeTBB()
480 printRegName(O, MO1.getReg()); in printAddrModeTBH()
482 printRegName(O, MO2.getReg()); in printAddrModeTBH()
512 if (!MO1.getReg()) { in printAddrMode2OffsetOperand()
521 printRegName(O, MO1.getReg()); in printAddrMode2OffsetOperand()
539 printRegName(O, MO1.getReg()); in printAM3PreOrOffsetIndexOp()
541 if (MO2.getReg()) { in printAM3PreOrOffsetIndexOp()
543 printRegName(O, MO2.getReg()); in printAM3PreOrOffsetIndexOp()
582 if (MO1.getReg()) { in printAddrMode3OffsetOperand()
584 printRegName(O, MO1.getReg()); in printAddrMode3OffsetOperand()
610 printRegName(O, MO1.getReg()); in printPostIdxRegOperand()
630 printRegName(O, MO1.getReg()); in printMveAddrModeRQOperand()
632 printRegName(O, MO2.getReg()); in printMveAddrModeRQOperand()
661 printRegName(O, MO1.getReg()); in printAddrMode5Operand()
685 printRegName(O, MO1.getReg()); in printAddrMode5FP16Operand()
707 printRegName(O, MO1.getReg()); in printAddrMode6Operand()
719 printRegName(O, MO1.getReg()); in printAddrMode7Operand()
728 if (MO.getReg() == 0) in printAddrMode6OffsetOperand()
732 printRegName(O, MO.getReg()); in printAddrMode6OffsetOperand()
811 return MRI.getEncodingValue(LHS.getReg()) < in printRegisterList()
812 MRI.getEncodingValue(RHS.getReg()); in printRegisterList()
820 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
828 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
997 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
998 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1098 printRegName(O, MO1.getReg()); in printThumbAddrModeRROperand()
1099 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand()
1120 printRegName(O, MO1.getReg()); in printThumbAddrModeImm5SOperand()
1165 unsigned Reg = MO1.getReg(); in printT2SOOperand()
1187 printRegName(O, MO1.getReg()); in printAddrModeImm12Operand()
1211 printRegName(O, MO1.getReg()); in printT2AddrModeImm8Operand()
1240 printRegName(O, MO1.getReg()); in printT2AddrModeImm8s4Operand()
1265 printRegName(O, MO1.getReg()); in printT2AddrModeImm0_1020s4Operand()
1315 printRegName(O, MO1.getReg()); in printT2AddrModeSoRegOperand()
1317 assert(MO2.getReg() && "Invalid so_reg load / store address!"); in printT2AddrModeSoRegOperand()
1319 printRegName(O, MO2.getReg()); in printT2AddrModeSoRegOperand()
1381 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1428 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1435 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1448 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1465 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1467 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1469 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1480 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1482 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1484 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1486 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1495 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1503 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1523 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1525 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1537 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1539 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1541 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1543 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1550 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1567 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1569 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1571 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1582 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1584 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1586 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1588 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1600 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1602 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1604 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1615 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1617 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1619 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1621 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1629 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()