Lines Matching refs:getOperand
101 const MCOperand &Dst = MI->getOperand(0); in printInst()
102 const MCOperand &MO1 = MI->getOperand(1); in printInst()
103 const MCOperand &MO2 = MI->getOperand(2); in printInst()
104 const MCOperand &MO3 = MI->getOperand(3); in printInst()
124 const MCOperand &Dst = MI->getOperand(0); in printInst()
125 const MCOperand &MO1 = MI->getOperand(1); in printInst()
126 const MCOperand &MO2 = MI->getOperand(2); in printInst()
151 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
165 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
166 MI->getOperand(3).getImm() == -4) { in printInst()
170 printRegName(O, MI->getOperand(1).getReg()); in printInst()
180 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
194 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
195 MI->getOperand(4).getImm() == 4) { in printInst()
199 printRegName(O, MI->getOperand(0).getReg()); in printInst()
209 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
222 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
234 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
236 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
265 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
272 NewMI.addOperand(MI->getOperand(0)); in printInst()
279 NewMI.addOperand(MI->getOperand(i)); in printInst()
290 switch (MI->getOperand(0).getImm()) { in printInst()
314 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
355 const MCOperand &Op = MI->getOperand(OpNum); in printOperand()
369 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
399 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
400 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
401 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
419 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
420 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
436 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp()
437 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp()
438 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM2PreOrOffsetIndexOp()
465 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB()
466 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB()
477 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH()
478 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH()
489 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand()
497 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAddrMode2Operand()
509 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
510 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
534 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp()
535 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp()
536 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM3PreOrOffsetIndexOp()
563 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand()
569 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) != in printAddrMode3Operand()
579 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
580 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
597 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
606 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
607 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
616 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
626 const MCOperand &MO1 = MI->getOperand(OpNum); in printMveAddrModeRQOperand()
627 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printMveAddrModeRQOperand()
644 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
652 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
653 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
676 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
677 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
703 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
704 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
717 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
727 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
740 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
752 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
759 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
766 unsigned val = MI->getOperand(OpNum).getImm(); in printTraceSyncBOption()
773 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
787 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
797 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
820 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
828 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
837 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
846 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
852 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
865 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
947 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
961 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
972 if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS) in printMandatoryRestrictedPredicateOperand()
982 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
990 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryInvertedPredicateOperand()
997 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
998 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1007 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
1013 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
1019 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
1025 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
1037 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
1059 O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4) in printThumbS4ImmOperand()
1066 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1075 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1089 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand()
1090 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand()
1111 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeImm5SOperand()
1112 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand()
1162 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1163 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1178 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1179 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1207 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1208 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1231 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1232 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1261 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1262 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1276 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1291 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1310 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1311 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1312 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1332 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1340 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printVMOVModImmOperand()
1351 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1358 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1368 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1381 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1408 O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm() in printFBits16()
1414 O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm() in printFBits32()
1421 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1428 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1435 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1448 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1465 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1467 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1469 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1480 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1482 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1484 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1486 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1495 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1503 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1521 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1523 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1525 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1537 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1539 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1541 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1543 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1550 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1567 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1569 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1571 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1582 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1584 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1586 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1588 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1600 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1602 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1604 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1615 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1617 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1619 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1621 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1629 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()
1643 unsigned Val = MI->getOperand(OpNo).getImm(); in printComplexRotationOp()
1650 ARMVCC::VPTCodes CC = (ARMVCC::VPTCodes)MI->getOperand(OpNum).getImm(); in printVPTPredicateOperand()
1659 unsigned Mask = MI->getOperand(OpNum).getImm(); in printVPTMask()
1674 uint32_t Val = MI->getOperand(OpNum).getImm(); in printMveSaturateOp()