92 void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address,  in printInst()  argument
95   unsigned Opcode = MI->getOpcode();  in printInst()
101     const MCOperand &Dst = MI->getOperand(0);  in printInst()
102     const MCOperand &MO1 = MI->getOperand(1);  in printInst()
103     const MCOperand &MO2 = MI->getOperand(2);  in printInst()
104     const MCOperand &MO3 = MI->getOperand(3);  in printInst()
107     printSBitModifierOperand(MI, 6, STI, O);  in printInst()
108     printPredicateOperand(MI, 4, STI, O);  in printInst()
124     const MCOperand &Dst = MI->getOperand(0);  in printInst()
125     const MCOperand &MO1 = MI->getOperand(1);  in printInst()
126     const MCOperand &MO2 = MI->getOperand(2);  in printInst()
129     printSBitModifierOperand(MI, 5, STI, O);  in printInst()
130     printPredicateOperand(MI, 3, STI, O);  in printInst()
151     if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) {  in printInst()
154       printPredicateOperand(MI, 2, STI, O);  in printInst()
158       printRegisterList(MI, 4, STI, O);  in printInst()
165     if (MI->getOperand(2).getReg() == ARM::SP &&  in printInst()
166         MI->getOperand(3).getImm() == -4) {  in printInst()
168       printPredicateOperand(MI, 4, STI, O);  in printInst()
170       printRegName(O, MI->getOperand(1).getReg());  in printInst()
180     if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) {  in printInst()
183       printPredicateOperand(MI, 2, STI, O);  in printInst()
187       printRegisterList(MI, 4, STI, O);  in printInst()
194     if (MI->getOperand(2).getReg() == ARM::SP &&  in printInst()
195         MI->getOperand(4).getImm() == 4) {  in printInst()
197       printPredicateOperand(MI, 5, STI, O);  in printInst()
199       printRegName(O, MI->getOperand(0).getReg());  in printInst()
209     if (MI->getOperand(0).getReg() == ARM::SP) {  in printInst()
211       printPredicateOperand(MI, 2, STI, O);  in printInst()
213       printRegisterList(MI, 4, STI, O);  in printInst()
222     if (MI->getOperand(0).getReg() == ARM::SP) {  in printInst()
224       printPredicateOperand(MI, 2, STI, O);  in printInst()
226       printRegisterList(MI, 4, STI, O);  in printInst()
234     unsigned BaseReg = MI->getOperand(0).getReg();  in printInst()
235     for (unsigned i = 3; i < MI->getNumOperands(); ++i) {  in printInst()
236       if (MI->getOperand(i).getReg() == BaseReg)  in printInst()
242     printPredicateOperand(MI, 1, STI, O);  in printInst()
248     printRegisterList(MI, 3, STI, O);  in printInst()
265     unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg();  in printInst()
272         NewMI.addOperand(MI->getOperand(0));  in printInst()
278       for (unsigned i = isStore ? 3 : 2; i < MI->getNumOperands(); ++i)  in printInst()
279         NewMI.addOperand(MI->getOperand(i));  in printInst()
290     switch (MI->getOperand(0).getImm()) {  in printInst()
292       if (!printAliasInstr(MI, Address, STI, O))  in printInst()
293         printInstruction(MI, Address, STI, O);  in printInst()
306   if (!printAliasInstr(MI, Address, STI, O))  in printInst()
307     printInstruction(MI, Address, STI, O);  in printInst()
312 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,  in printOperand()  argument
314   const MCOperand &Op = MI->getOperand(OpNo);  in printOperand()
352 void ARMInstPrinter::printOperand(const MCInst *MI, uint64_t Address,  in printOperand()  argument
355   const MCOperand &Op = MI->getOperand(OpNum);  in printOperand()
357     return printOperand(MI, OpNum, STI, O);  in printOperand()
358   uint64_t Target = ARM_MC::evaluateBranchTarget(MII.get(MI->getOpcode()),  in printOperand()
366 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,  in printThumbLdrLabelOperand()  argument
369   const MCOperand &MO1 = MI->getOperand(OpNum);  in printThumbLdrLabelOperand()
396 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,  in printSORegRegOperand()  argument
399   const MCOperand &MO1 = MI->getOperand(OpNum);  in printSORegRegOperand()
400   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printSORegRegOperand()
401   const MCOperand &MO3 = MI->getOperand(OpNum + 2);  in printSORegRegOperand()
416 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,  in printSORegImmOperand()  argument
419   const MCOperand &MO1 = MI->getOperand(OpNum);  in printSORegImmOperand()
420   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printSORegImmOperand()
433 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,  in printAM2PreOrOffsetIndexOp()  argument
436   const MCOperand &MO1 = MI->getOperand(Op);  in printAM2PreOrOffsetIndexOp()
437   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAM2PreOrOffsetIndexOp()
438   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAM2PreOrOffsetIndexOp()
462 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op,  in printAddrModeTBB()  argument
465   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrModeTBB()
466   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAddrModeTBB()
474 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op,  in printAddrModeTBH()  argument
477   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrModeTBH()
478   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAddrModeTBH()
486 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,  in printAddrMode2Operand()  argument
489   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrMode2Operand()
492     printOperand(MI, Op, STI, O);  in printAddrMode2Operand()
497   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAddrMode2Operand()
502   printAM2PreOrOffsetIndexOp(MI, Op, STI, O);  in printAddrMode2Operand()
505 void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI,  in printAddrMode2OffsetOperand()  argument
509   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode2OffsetOperand()
510   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode2OffsetOperand()
531 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,  in printAM3PreOrOffsetIndexOp()  argument
534   const MCOperand &MO1 = MI->getOperand(Op);  in printAM3PreOrOffsetIndexOp()
535   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printAM3PreOrOffsetIndexOp()
536   const MCOperand &MO3 = MI->getOperand(Op + 2);  in printAM3PreOrOffsetIndexOp()
560 void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op,  in printAddrMode3Operand()  argument
563   const MCOperand &MO1 = MI->getOperand(Op);  in printAddrMode3Operand()
565     printOperand(MI, Op, STI, O);  in printAddrMode3Operand()
569   assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) !=  in printAddrMode3Operand()
572   printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0);  in printAddrMode3Operand()
575 void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI,  in printAddrMode3OffsetOperand()  argument
579   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode3OffsetOperand()
580   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode3OffsetOperand()
594 void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,  in printPostIdxImm8Operand()  argument
597   const MCOperand &MO = MI->getOperand(OpNum);  in printPostIdxImm8Operand()
603 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,  in printPostIdxRegOperand()  argument
606   const MCOperand &MO1 = MI->getOperand(OpNum);  in printPostIdxRegOperand()
607   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printPostIdxRegOperand()
613 void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,  in printPostIdxImm8s4Operand()  argument
616   const MCOperand &MO = MI->getOperand(OpNum);  in printPostIdxImm8s4Operand()
623 void ARMInstPrinter::printMveAddrModeRQOperand(const MCInst *MI, unsigned OpNum,  in printMveAddrModeRQOperand()  argument
626   const MCOperand &MO1 = MI->getOperand(OpNum);  in printMveAddrModeRQOperand()
627   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printMveAddrModeRQOperand()
640 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum,  in printLdStmModeOperand()  argument
644       ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm());  in printLdStmModeOperand()
649 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode5Operand()  argument
652   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode5Operand()
653   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode5Operand()
656     printOperand(MI, OpNum, STI, O);  in printAddrMode5Operand()
673 void ARMInstPrinter::printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode5FP16Operand()  argument
676   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode5FP16Operand()
677   const MCOperand &MO2 = MI->getOperand(OpNum+1);  in printAddrMode5FP16Operand()
680     printOperand(MI, OpNum, STI, O);  in printAddrMode5FP16Operand()
700 void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode6Operand()  argument
703   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode6Operand()
704   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrMode6Operand()
714 void ARMInstPrinter::printAddrMode7Operand(const MCInst *MI, unsigned OpNum,  in printAddrMode7Operand()  argument
717   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrMode7Operand()
723 void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI,  in printAddrMode6OffsetOperand()  argument
727   const MCOperand &MO = MI->getOperand(OpNum);  in printAddrMode6OffsetOperand()
736 void ARMInstPrinter::printBitfieldInvMaskImmOperand(const MCInst *MI,  in printBitfieldInvMaskImmOperand()  argument
740   const MCOperand &MO = MI->getOperand(OpNum);  in printBitfieldInvMaskImmOperand()
749 void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum,  in printMemBOption()  argument
752   unsigned val = MI->getOperand(OpNum).getImm();  in printMemBOption()
756 void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum,  in printInstSyncBOption()  argument
759   unsigned val = MI->getOperand(OpNum).getImm();  in printInstSyncBOption()
763 void ARMInstPrinter::printTraceSyncBOption(const MCInst *MI, unsigned OpNum,  in printTraceSyncBOption()  argument
766   unsigned val = MI->getOperand(OpNum).getImm();  in printTraceSyncBOption()
770 void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum,  in printShiftImmOperand()  argument
773   unsigned ShiftOp = MI->getOperand(OpNum).getImm();  in printShiftImmOperand()
784 void ARMInstPrinter::printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum,  in printPKHLSLShiftImm()  argument
787   unsigned Imm = MI->getOperand(OpNum).getImm();  in printPKHLSLShiftImm()
794 void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum,  in printPKHASRShiftImm()  argument
797   unsigned Imm = MI->getOperand(OpNum).getImm();  in printPKHASRShiftImm()
805 void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum,  in printRegisterList()  argument
808   if (MI->getOpcode() != ARM::t2CLRM) {  in printRegisterList()
809     assert(is_sorted(drop_begin(*MI, OpNum),  in printRegisterList()
817   for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {  in printRegisterList()
820     printRegName(O, MI->getOperand(i).getReg());  in printRegisterList()
825 void ARMInstPrinter::printGPRPairOperand(const MCInst *MI, unsigned OpNum,  in printGPRPairOperand()  argument
828   unsigned Reg = MI->getOperand(OpNum).getReg();  in printGPRPairOperand()
834 void ARMInstPrinter::printSetendOperand(const MCInst *MI, unsigned OpNum,  in printSetendOperand()  argument
837   const MCOperand &Op = MI->getOperand(OpNum);  in printSetendOperand()
844 void ARMInstPrinter::printCPSIMod(const MCInst *MI, unsigned OpNum,  in printCPSIMod()  argument
846   const MCOperand &Op = MI->getOperand(OpNum);  in printCPSIMod()
850 void ARMInstPrinter::printCPSIFlag(const MCInst *MI, unsigned OpNum,  in printCPSIFlag()  argument
852   const MCOperand &Op = MI->getOperand(OpNum);  in printCPSIFlag()
862 void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum,  in printMSRMaskOperand()  argument
865   const MCOperand &Op = MI->getOperand(OpNum);  in printMSRMaskOperand()
870     unsigned Opcode = MI->getOpcode();  in printMSRMaskOperand()
944 void ARMInstPrinter::printBankedRegOperand(const MCInst *MI, unsigned OpNum,  in printBankedRegOperand()  argument
947   uint32_t Banked = MI->getOperand(OpNum).getImm();  in printBankedRegOperand()
958 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,  in printPredicateOperand()  argument
961   ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();  in printPredicateOperand()
970     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printMandatoryRestrictedPredicateOperand()  argument
972   if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS)  in printMandatoryRestrictedPredicateOperand()
975     printMandatoryPredicateOperand(MI, OpNum, STI, O);  in printMandatoryRestrictedPredicateOperand()
978 void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI,  in printMandatoryPredicateOperand()  argument
982   ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();  in printMandatoryPredicateOperand()
986 void ARMInstPrinter::printMandatoryInvertedPredicateOperand(const MCInst *MI,  in printMandatoryInvertedPredicateOperand()  argument
990   ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();  in printMandatoryInvertedPredicateOperand()
994 void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum,  in printSBitModifierOperand()  argument
997   if (MI->getOperand(OpNum).getReg()) {  in printSBitModifierOperand()
998     assert(MI->getOperand(OpNum).getReg() == ARM::CPSR &&  in printSBitModifierOperand()
1004 void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum,  in printNoHashImmediate()  argument
1007   O << MI->getOperand(OpNum).getImm();  in printNoHashImmediate()
1010 void ARMInstPrinter::printPImmediate(const MCInst *MI, unsigned OpNum,  in printPImmediate()  argument
1013   O << "p" << MI->getOperand(OpNum).getImm();  in printPImmediate()
1016 void ARMInstPrinter::printCImmediate(const MCInst *MI, unsigned OpNum,  in printCImmediate()  argument
1019   O << "c" << MI->getOperand(OpNum).getImm();  in printCImmediate()
1022 void ARMInstPrinter::printCoprocOptionImm(const MCInst *MI, unsigned OpNum,  in printCoprocOptionImm()  argument
1025   O << "{" << MI->getOperand(OpNum).getImm() << "}";  in printCoprocOptionImm()
1028 void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum,  in printPCLabel()  argument
1034 void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum,  in printAdrLabelOperand()  argument
1037   const MCOperand &MO = MI->getOperand(OpNum);  in printAdrLabelOperand()
1056 void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,  in printThumbS4ImmOperand()  argument
1059   O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4)  in printThumbS4ImmOperand()
1063 void ARMInstPrinter::printThumbSRImm(const MCInst *MI, unsigned OpNum,  in printThumbSRImm()  argument
1066   unsigned Imm = MI->getOperand(OpNum).getImm();  in printThumbSRImm()
1071 void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum,  in printThumbITMask()  argument
1075   unsigned Mask = MI->getOperand(OpNum).getImm();  in printThumbITMask()
1086 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op,  in printThumbAddrModeRROperand()  argument
1089   const MCOperand &MO1 = MI->getOperand(Op);  in printThumbAddrModeRROperand()
1090   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printThumbAddrModeRROperand()
1093     printOperand(MI, Op, STI, O);  in printThumbAddrModeRROperand()
1106 void ARMInstPrinter::printThumbAddrModeImm5SOperand(const MCInst *MI,  in printThumbAddrModeImm5SOperand()  argument
1111   const MCOperand &MO1 = MI->getOperand(Op);  in printThumbAddrModeImm5SOperand()
1112   const MCOperand &MO2 = MI->getOperand(Op + 1);  in printThumbAddrModeImm5SOperand()
1115     printOperand(MI, Op, STI, O);  in printThumbAddrModeImm5SOperand()
1128 void ARMInstPrinter::printThumbAddrModeImm5S1Operand(const MCInst *MI,  in printThumbAddrModeImm5S1Operand()  argument
1132   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 1);  in printThumbAddrModeImm5S1Operand()
1135 void ARMInstPrinter::printThumbAddrModeImm5S2Operand(const MCInst *MI,  in printThumbAddrModeImm5S2Operand()  argument
1139   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 2);  in printThumbAddrModeImm5S2Operand()
1142 void ARMInstPrinter::printThumbAddrModeImm5S4Operand(const MCInst *MI,  in printThumbAddrModeImm5S4Operand()  argument
1146   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);  in printThumbAddrModeImm5S4Operand()
1149 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,  in printThumbAddrModeSPOperand()  argument
1152   printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4);  in printThumbAddrModeSPOperand()
1159 void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum,  in printT2SOOperand()  argument
1162   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2SOOperand()
1163   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2SOOperand()
1175 void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,  in printAddrModeImm12Operand()  argument
1178   const MCOperand &MO1 = MI->getOperand(OpNum);  in printAddrModeImm12Operand()
1179   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printAddrModeImm12Operand()
1182     printOperand(MI, OpNum, STI, O);  in printAddrModeImm12Operand()
1203 void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI,  in printT2AddrModeImm8Operand()  argument
1207   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8Operand()
1208   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm8Operand()
1227 void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI,  in printT2AddrModeImm8s4Operand()  argument
1231   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8s4Operand()
1232   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm8s4Operand()
1235     printOperand(MI, OpNum, STI, O);  in printT2AddrModeImm8s4Operand()
1259     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm0_1020s4Operand()  argument
1261   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm0_1020s4Operand()
1262   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeImm0_1020s4Operand()
1274     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm8OffsetOperand()  argument
1276   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8OffsetOperand()
1289     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printT2AddrModeImm8s4OffsetOperand()  argument
1291   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeImm8s4OffsetOperand()
1306 void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI,  in printT2AddrModeSoRegOperand()  argument
1310   const MCOperand &MO1 = MI->getOperand(OpNum);  in printT2AddrModeSoRegOperand()
1311   const MCOperand &MO2 = MI->getOperand(OpNum + 1);  in printT2AddrModeSoRegOperand()
1312   const MCOperand &MO3 = MI->getOperand(OpNum + 2);  in printT2AddrModeSoRegOperand()
1329 void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,  in printFPImmOperand()  argument
1332   const MCOperand &MO = MI->getOperand(OpNum);  in printFPImmOperand()
1337 void ARMInstPrinter::printVMOVModImmOperand(const MCInst *MI, unsigned OpNum,  in printVMOVModImmOperand()  argument
1340   unsigned EncodedImm = MI->getOperand(OpNum).getImm();  in printVMOVModImmOperand()
1348 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,  in printImmPlusOneOperand()  argument
1351   unsigned Imm = MI->getOperand(OpNum).getImm();  in printImmPlusOneOperand()
1355 void ARMInstPrinter::printRotImmOperand(const MCInst *MI, unsigned OpNum,  in printRotImmOperand()  argument
1358   unsigned Imm = MI->getOperand(OpNum).getImm();  in printRotImmOperand()
1365 void ARMInstPrinter::printModImmOperand(const MCInst *MI, unsigned OpNum,  in printModImmOperand()  argument
1368   MCOperand Op = MI->getOperand(OpNum);  in printModImmOperand()
1372     return printOperand(MI, OpNum, STI, O);  in printModImmOperand()
1378   switch (MI->getOpcode()) {  in printModImmOperand()
1381     PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC);  in printModImmOperand()
1406 void ARMInstPrinter::printFBits16(const MCInst *MI, unsigned OpNum,  in printFBits16()  argument
1408   O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm()  in printFBits16()
1412 void ARMInstPrinter::printFBits32(const MCInst *MI, unsigned OpNum,  in printFBits32()  argument
1414   O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm()  in printFBits32()
1418 void ARMInstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,  in printVectorIndex()  argument
1421   O << "[" << MI->getOperand(OpNum).getImm() << "]";  in printVectorIndex()
1424 void ARMInstPrinter::printVectorListOne(const MCInst *MI, unsigned OpNum,  in printVectorListOne()  argument
1428   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListOne()
1432 void ARMInstPrinter::printVectorListTwo(const MCInst *MI, unsigned OpNum,  in printVectorListTwo()  argument
1435   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwo()
1445 void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum,  in printVectorListTwoSpaced()  argument
1448   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoSpaced()
1458 void ARMInstPrinter::printVectorListThree(const MCInst *MI, unsigned OpNum,  in printVectorListThree()  argument
1465   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThree()
1467   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListThree()
1469   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThree()
1473 void ARMInstPrinter::printVectorListFour(const MCInst *MI, unsigned OpNum,  in printVectorListFour()  argument
1480   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFour()
1482   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListFour()
1484   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFour()
1486   printRegName(O, MI->getOperand(OpNum).getReg() + 3);  in printVectorListFour()
1490 void ARMInstPrinter::printVectorListOneAllLanes(const MCInst *MI,  in printVectorListOneAllLanes()  argument
1495   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListOneAllLanes()
1499 void ARMInstPrinter::printVectorListTwoAllLanes(const MCInst *MI,  in printVectorListTwoAllLanes()  argument
1503   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoAllLanes()
1513 void ARMInstPrinter::printVectorListThreeAllLanes(const MCInst *MI,  in printVectorListThreeAllLanes()  argument
1521   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeAllLanes()
1523   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListThreeAllLanes()
1525   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeAllLanes()
1529 void ARMInstPrinter::printVectorListFourAllLanes(const MCInst *MI,  in printVectorListFourAllLanes()  argument
1537   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourAllLanes()
1539   printRegName(O, MI->getOperand(OpNum).getReg() + 1);  in printVectorListFourAllLanes()
1541   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourAllLanes()
1543   printRegName(O, MI->getOperand(OpNum).getReg() + 3);  in printVectorListFourAllLanes()
1548     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListTwoSpacedAllLanes()  argument
1550   unsigned Reg = MI->getOperand(OpNum).getReg();  in printVectorListTwoSpacedAllLanes()
1561     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListThreeSpacedAllLanes()  argument
1567   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeSpacedAllLanes()
1569   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeSpacedAllLanes()
1571   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListThreeSpacedAllLanes()
1576     const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,  in printVectorListFourSpacedAllLanes()  argument
1582   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourSpacedAllLanes()
1584   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourSpacedAllLanes()
1586   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListFourSpacedAllLanes()
1588   printRegName(O, MI->getOperand(OpNum).getReg() + 6);  in printVectorListFourSpacedAllLanes()
1592 void ARMInstPrinter::printVectorListThreeSpaced(const MCInst *MI,  in printVectorListThreeSpaced()  argument
1600   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListThreeSpaced()
1602   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListThreeSpaced()
1604   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListThreeSpaced()
1608 void ARMInstPrinter::printVectorListFourSpaced(const MCInst *MI, unsigned OpNum,  in printVectorListFourSpaced()  argument
1615   printRegName(O, MI->getOperand(OpNum).getReg());  in printVectorListFourSpaced()
1617   printRegName(O, MI->getOperand(OpNum).getReg() + 2);  in printVectorListFourSpaced()
1619   printRegName(O, MI->getOperand(OpNum).getReg() + 4);  in printVectorListFourSpaced()
1621   printRegName(O, MI->getOperand(OpNum).getReg() + 6);  in printVectorListFourSpaced()
1626 void ARMInstPrinter::printMVEVectorList(const MCInst *MI, unsigned OpNum,  in printMVEVectorList()  argument
1629   unsigned Reg = MI->getOperand(OpNum).getReg();  in printMVEVectorList()
1640 void ARMInstPrinter::printComplexRotationOp(const MCInst *MI, unsigned OpNo,  in printComplexRotationOp()  argument
1643   unsigned Val = MI->getOperand(OpNo).getImm();  in printComplexRotationOp()
1647 void ARMInstPrinter::printVPTPredicateOperand(const MCInst *MI, unsigned OpNum,  in printVPTPredicateOperand()  argument
1650   ARMVCC::VPTCodes CC = (ARMVCC::VPTCodes)MI->getOperand(OpNum).getImm();  in printVPTPredicateOperand()
1655 void ARMInstPrinter::printVPTMask(const MCInst *MI, unsigned OpNum,  in printVPTMask()  argument
1659   unsigned Mask = MI->getOperand(OpNum).getImm();  in printVPTMask()
1671 void ARMInstPrinter::printMveSaturateOp(const MCInst *MI, unsigned OpNum,  in printMveSaturateOp()  argument
1674   uint32_t Val = MI->getOperand(OpNum).getImm();  in printMveSaturateOp()