Lines Matching refs:Inst
180 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
183 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo,
186 static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo,
189 static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo,
193 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo,
196 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo,
199 static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo,
203 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
205 static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo,
209 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
211 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
214 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo,
217 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
220 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo,
224 DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
226 static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo,
229 static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo,
232 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo,
235 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo,
238 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
241 static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo,
244 static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo,
247 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,
250 static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo,
253 static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo,
256 static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo,
259 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,
263 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
266 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val,
269 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val,
272 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val,
275 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
278 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
282 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn,
285 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn,
289 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
291 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn,
294 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn,
297 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn,
300 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn,
303 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn,
308 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn,
311 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn,
314 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn,
317 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn,
320 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn,
323 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn,
326 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn,
329 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn,
332 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn,
335 static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn,
338 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val,
341 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val,
344 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val,
347 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val,
350 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn,
353 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn,
356 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val,
359 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Val,
362 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Val,
365 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Val,
368 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Val,
371 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val,
374 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val,
377 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val,
380 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Val,
383 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val,
386 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val,
389 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Val,
392 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Val,
395 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn,
398 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Val,
401 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val,
404 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val,
407 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val,
410 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val,
413 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn,
416 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn,
419 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn,
423 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
426 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn,
429 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn,
432 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn,
435 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, uint64_t Address,
437 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn,
440 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn,
443 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn,
446 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn,
449 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn,
452 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn,
455 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn,
458 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
460 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
462 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
464 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
466 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address,
468 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address,
470 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address,
472 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address,
474 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address,
476 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address,
478 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address,
480 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address,
482 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address,
484 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Insn,
488 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Val, uint64_t Address,
491 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn,
494 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
497 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
500 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val,
503 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val,
506 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val,
509 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val,
512 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val,
515 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val,
518 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Val,
521 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn,
524 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn,
527 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address,
529 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn,
532 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address,
534 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address,
536 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val,
539 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val,
542 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val,
545 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address,
548 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address,
550 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val,
554 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val,
558 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val,
561 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Val,
564 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn,
567 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn,
570 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn,
573 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn,
576 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val,
579 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Val,
582 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Val,
585 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address,
587 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val,
590 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val,
593 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val, uint64_t Address,
595 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn,
598 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn,
601 static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val, uint64_t Address,
603 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Val,
606 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, unsigned Val,
610 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address,
612 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val,
615 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val,
620 static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned val,
623 static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned val,
626 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val,
629 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address,
631 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val,
634 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address,
636 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val,
639 static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned Val,
643 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
646 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
649 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
652 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address,
655 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Insn,
659 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val,
663 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val,
667 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val,
671 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val,
676 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address,
678 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn,
681 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn,
684 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn,
687 typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val,
691 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address,
693 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address,
695 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn,
699 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address,
701 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
1296 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass() argument
1303 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRRegisterClass()
1307 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeCLRMGPRRegisterClass() argument
1317 Inst.addOperand(MCOperand::createReg(Register)); in DecodeCLRMGPRRegisterClass()
1321 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass() argument
1329 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); in DecodeGPRnopcRegisterClass()
1334 static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnospRegisterClass() argument
1342 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); in DecodeGPRnospRegisterClass()
1348 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithAPSRRegisterClass() argument
1354 Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSRRegisterClass()
1358 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); in DecodeGPRwithAPSRRegisterClass()
1363 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithZRRegisterClass() argument
1369 Inst.addOperand(MCOperand::createReg(ARM::ZR)); in DecodeGPRwithZRRegisterClass()
1376 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); in DecodeGPRwithZRRegisterClass()
1381 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRwithZRnospRegisterClass() argument
1386 Check(S, DecodeGPRwithZRRegisterClass(Inst, RegNo, Address, Decoder)); in DecodeGPRwithZRnospRegisterClass()
1390 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass() argument
1395 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodetGPRRegisterClass()
1403 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRPairRegisterClass() argument
1417 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeGPRPairRegisterClass()
1422 DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeGPRPairnospRegisterClass() argument
1428 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeGPRPairnospRegisterClass()
1435 static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRspRegisterClass() argument
1442 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRspRegisterClass()
1446 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetcGPRRegisterClass() argument
1473 Inst.addOperand(MCOperand::createReg(Register)); in DecodetcGPRRegisterClass()
1477 static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecoderGPRRegisterClass() argument
1488 Check(S, DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder)); in DecoderGPRRegisterClass()
1503 static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeSPRRegisterClass() argument
1510 Inst.addOperand(MCOperand::createReg(Register)); in DecodeSPRRegisterClass()
1514 static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeHPRRegisterClass() argument
1517 return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeHPRRegisterClass()
1531 static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPRRegisterClass() argument
1543 Inst.addOperand(MCOperand::createReg(Register)); in DecodeDPRRegisterClass()
1547 static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPR_8RegisterClass() argument
1552 return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDPR_8RegisterClass()
1555 static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeSPR_8RegisterClass() argument
1560 return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeSPR_8RegisterClass()
1563 static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPR_VFP2RegisterClass() argument
1568 return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDPR_VFP2RegisterClass()
1578 static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeQPRRegisterClass() argument
1586 Inst.addOperand(MCOperand::createReg(Register)); in DecodeQPRRegisterClass()
1599 static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDPairRegisterClass() argument
1606 Inst.addOperand(MCOperand::createReg(Register)); in DecodeDPairRegisterClass()
1622 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, in DecodeDPairSpacedRegisterClass() argument
1628 Inst.addOperand(MCOperand::createReg(Register)); in DecodeDPairSpacedRegisterClass()
1632 static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val, in DecodePredicateOperand() argument
1638 if (Inst.getOpcode() == ARM::tBcc && Val == 0xE) in DecodePredicateOperand()
1640 if (Val != ARMCC::AL && !ARMInsts[Inst.getOpcode()].isPredicable()) in DecodePredicateOperand()
1642 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredicateOperand()
1644 Inst.addOperand(MCOperand::createReg(0)); in DecodePredicateOperand()
1646 Inst.addOperand(MCOperand::createReg(ARM::CPSR)); in DecodePredicateOperand()
1650 static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val, in DecodeCCOutOperand() argument
1654 Inst.addOperand(MCOperand::createReg(ARM::CPSR)); in DecodeCCOutOperand()
1656 Inst.addOperand(MCOperand::createReg(0)); in DecodeCCOutOperand()
1660 static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val, in DecodeSORegImmOperand() argument
1670 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeSORegImmOperand()
1693 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand()
1698 static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val, in DecodeSORegRegOperand() argument
1708 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) in DecodeSORegRegOperand()
1710 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rs, Address, Decoder))) in DecodeSORegRegOperand()
1729 Inst.addOperand(MCOperand::createImm(Shift)); in DecodeSORegRegOperand()
1734 static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val, in DecodeRegListOperand() argument
1742 switch (Inst.getOpcode()) { in DecodeRegListOperand()
1754 WritebackReg = Inst.getOperand(0).getReg(); in DecodeRegListOperand()
1766 if (!Check(S, DecodeCLRMGPRRegisterClass(Inst, i, Address, Decoder))) { in DecodeRegListOperand()
1770 if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder))) in DecodeRegListOperand()
1773 if (NeedDisjointWriteback && WritebackReg == Inst.end()[-1].getReg()) in DecodeRegListOperand()
1782 static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, in DecodeSPRRegListOperand() argument
1797 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1800 if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1807 static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, in DecodeDPRRegListOperand() argument
1823 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeDPRRegListOperand()
1826 if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeDPRRegListOperand()
1833 static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, in DecodeBitfieldMaskOperand() argument
1857 Inst.addOperand(MCOperand::createImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand()
1861 static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, in DecodeCopMemInstruction() argument
1875 switch (Inst.getOpcode()) { in DecodeCopMemInstruction()
1947 Inst.addOperand(MCOperand::createImm(coproc)); in DecodeCopMemInstruction()
1948 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction()
1949 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeCopMemInstruction()
1952 switch (Inst.getOpcode()) { in DecodeCopMemInstruction()
1986 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction()
2009 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction()
2013 switch (Inst.getOpcode()) { in DecodeCopMemInstruction()
2030 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeCopMemInstruction()
2041 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeAddrMode2IdxInstruction() argument
2055 switch (Inst.getOpcode()) { in DecodeAddrMode2IdxInstruction()
2064 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2071 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2075 switch (Inst.getOpcode()) { in DecodeAddrMode2IdxInstruction()
2084 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2091 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2109 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2133 Inst.addOperand(MCOperand::createImm(imm)); in DecodeAddrMode2IdxInstruction()
2135 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode2IdxInstruction()
2137 Inst.addOperand(MCOperand::createImm(tmp)); in DecodeAddrMode2IdxInstruction()
2140 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
2146 static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val, in DecodeSORegMemOperand() argument
2176 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSORegMemOperand()
2178 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeSORegMemOperand()
2185 Inst.addOperand(MCOperand::createImm(shift)); in DecodeSORegMemOperand()
2190 static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn, in DecodeTSBInstruction() argument
2193 if (Inst.getOpcode() != ARM::TSB && Inst.getOpcode() != ARM::t2TSB) in DecodeTSBInstruction()
2199 Inst.addOperand(MCOperand::createImm(ARM_TSB::CSYNC)); in DecodeTSBInstruction()
2203 static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, in DecodeAddrMode3Instruction() argument
2222 switch (Inst.getOpcode()) { in DecodeAddrMode3Instruction()
2234 switch (Inst.getOpcode()) { in DecodeAddrMode3Instruction()
2321 switch (Inst.getOpcode()) { in DecodeAddrMode3Instruction()
2328 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode3Instruction()
2336 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeAddrMode3Instruction()
2338 switch (Inst.getOpcode()) { in DecodeAddrMode3Instruction()
2345 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt+1, Address, Decoder))) in DecodeAddrMode3Instruction()
2354 switch (Inst.getOpcode()) { in DecodeAddrMode3Instruction()
2369 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode3Instruction()
2377 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode3Instruction()
2381 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode3Instruction()
2382 Inst.addOperand(MCOperand::createImm(U | (imm << 4) | Rm)); in DecodeAddrMode3Instruction()
2384 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeAddrMode3Instruction()
2386 Inst.addOperand(MCOperand::createImm(U)); in DecodeAddrMode3Instruction()
2389 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeAddrMode3Instruction()
2395 static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn, in DecodeRFEInstruction() argument
2418 Inst.addOperand(MCOperand::createImm(mode)); in DecodeRFEInstruction()
2419 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeRFEInstruction()
2425 static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, in DecodeQADDInstruction() argument
2436 return DecodeCPSInstruction(Inst, Insn, Address, Decoder); in DecodeQADDInstruction()
2438 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) in DecodeQADDInstruction()
2440 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) in DecodeQADDInstruction()
2442 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeQADDInstruction()
2444 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeQADDInstruction()
2450 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, in DecodeMemMultipleWritebackInstruction() argument
2461 switch (Inst.getOpcode()) { in DecodeMemMultipleWritebackInstruction()
2463 Inst.setOpcode(ARM::RFEDA); in DecodeMemMultipleWritebackInstruction()
2466 Inst.setOpcode(ARM::RFEDA_UPD); in DecodeMemMultipleWritebackInstruction()
2469 Inst.setOpcode(ARM::RFEDB); in DecodeMemMultipleWritebackInstruction()
2472 Inst.setOpcode(ARM::RFEDB_UPD); in DecodeMemMultipleWritebackInstruction()
2475 Inst.setOpcode(ARM::RFEIA); in DecodeMemMultipleWritebackInstruction()
2478 Inst.setOpcode(ARM::RFEIA_UPD); in DecodeMemMultipleWritebackInstruction()
2481 Inst.setOpcode(ARM::RFEIB); in DecodeMemMultipleWritebackInstruction()
2484 Inst.setOpcode(ARM::RFEIB_UPD); in DecodeMemMultipleWritebackInstruction()
2487 Inst.setOpcode(ARM::SRSDA); in DecodeMemMultipleWritebackInstruction()
2490 Inst.setOpcode(ARM::SRSDA_UPD); in DecodeMemMultipleWritebackInstruction()
2493 Inst.setOpcode(ARM::SRSDB); in DecodeMemMultipleWritebackInstruction()
2496 Inst.setOpcode(ARM::SRSDB_UPD); in DecodeMemMultipleWritebackInstruction()
2499 Inst.setOpcode(ARM::SRSIA); in DecodeMemMultipleWritebackInstruction()
2502 Inst.setOpcode(ARM::SRSIA_UPD); in DecodeMemMultipleWritebackInstruction()
2505 Inst.setOpcode(ARM::SRSIB); in DecodeMemMultipleWritebackInstruction()
2508 Inst.setOpcode(ARM::SRSIB_UPD); in DecodeMemMultipleWritebackInstruction()
2521 Inst.addOperand( in DecodeMemMultipleWritebackInstruction()
2526 return DecodeRFEInstruction(Inst, Insn, Address, Decoder); in DecodeMemMultipleWritebackInstruction()
2529 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeMemMultipleWritebackInstruction()
2531 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeMemMultipleWritebackInstruction()
2533 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeMemMultipleWritebackInstruction()
2535 if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder))) in DecodeMemMultipleWritebackInstruction()
2542 static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, in DecodeHINTInstruction() argument
2552 Inst.addOperand(MCOperand::createImm(imm8)); in DecodeHINTInstruction()
2554 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeHINTInstruction()
2565 static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, in DecodeCPSInstruction() argument
2590 Inst.setOpcode(ARM::CPS3p); in DecodeCPSInstruction()
2591 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction()
2592 Inst.addOperand(MCOperand::createImm(iflags)); in DecodeCPSInstruction()
2593 Inst.addOperand(MCOperand::createImm(mode)); in DecodeCPSInstruction()
2595 Inst.setOpcode(ARM::CPS2p); in DecodeCPSInstruction()
2596 Inst.addOperand(MCOperand::createImm(imod)); in DecodeCPSInstruction()
2597 Inst.addOperand(MCOperand::createImm(iflags)); in DecodeCPSInstruction()
2600 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction()
2601 Inst.addOperand(MCOperand::createImm(mode)); in DecodeCPSInstruction()
2605 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction()
2606 Inst.addOperand(MCOperand::createImm(mode)); in DecodeCPSInstruction()
2613 static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, in DecodeT2CPSInstruction() argument
2631 Inst.setOpcode(ARM::t2CPS3p); in DecodeT2CPSInstruction()
2632 Inst.addOperand(MCOperand::createImm(imod)); in DecodeT2CPSInstruction()
2633 Inst.addOperand(MCOperand::createImm(iflags)); in DecodeT2CPSInstruction()
2634 Inst.addOperand(MCOperand::createImm(mode)); in DecodeT2CPSInstruction()
2636 Inst.setOpcode(ARM::t2CPS2p); in DecodeT2CPSInstruction()
2637 Inst.addOperand(MCOperand::createImm(imod)); in DecodeT2CPSInstruction()
2638 Inst.addOperand(MCOperand::createImm(iflags)); in DecodeT2CPSInstruction()
2641 Inst.setOpcode(ARM::t2CPS1p); in DecodeT2CPSInstruction()
2642 Inst.addOperand(MCOperand::createImm(mode)); in DecodeT2CPSInstruction()
2649 Inst.setOpcode(ARM::t2HINT); in DecodeT2CPSInstruction()
2650 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2CPSInstruction()
2657 DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeT2HintSpaceInstruction() argument
2673 Inst.setOpcode(Opcode); in DecodeT2HintSpaceInstruction()
2675 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2HintSpaceInstruction()
2681 static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, in DecodeT2MOVTWInstruction() argument
2694 if (Inst.getOpcode() == ARM::t2MOVTi16) in DecodeT2MOVTWInstruction()
2695 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeT2MOVTWInstruction()
2697 if (!Check(S, DecoderGPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeT2MOVTWInstruction()
2700 if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder)) in DecodeT2MOVTWInstruction()
2701 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2MOVTWInstruction()
2706 static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, in DecodeArmMOVTWInstruction() argument
2718 if (Inst.getOpcode() == ARM::MOVTi16) in DecodeArmMOVTWInstruction()
2719 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) in DecodeArmMOVTWInstruction()
2722 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) in DecodeArmMOVTWInstruction()
2725 if (!tryAddingSymbolicOperand(Address, imm, false, 4, Inst, Decoder)) in DecodeArmMOVTWInstruction()
2726 Inst.addOperand(MCOperand::createImm(imm)); in DecodeArmMOVTWInstruction()
2728 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeArmMOVTWInstruction()
2734 static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, in DecodeSMLAInstruction() argument
2746 return DecodeCPSInstruction(Inst, Insn, Address, Decoder); in DecodeSMLAInstruction()
2748 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) in DecodeSMLAInstruction()
2750 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSMLAInstruction()
2752 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) in DecodeSMLAInstruction()
2754 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder))) in DecodeSMLAInstruction()
2757 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeSMLAInstruction()
2763 static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn, in DecodeTSTInstruction() argument
2773 return DecodeSETPANInstruction(Inst, Insn, Address, Decoder); in DecodeTSTInstruction()
2775 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeTSTInstruction()
2777 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeTSTInstruction()
2779 if (!Check(S, DecodePredicateOperand(Inst, Pred, Address, Decoder))) in DecodeTSTInstruction()
2785 static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, in DecodeSETPANInstruction() argument
2808 Inst.setOpcode(ARM::SETPAN); in DecodeSETPANInstruction()
2809 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeSETPANInstruction()
2814 static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, in DecodeAddrModeImm12Operand() argument
2823 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrModeImm12Operand()
2828 Inst.addOperand(MCOperand::createImm(imm)); in DecodeAddrModeImm12Operand()
2835 static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, in DecodeAddrMode5Operand() argument
2845 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode5Operand()
2849 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5Opc(ARM_AM::add, imm))); in DecodeAddrMode5Operand()
2851 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5Opc(ARM_AM::sub, imm))); in DecodeAddrMode5Operand()
2856 static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, in DecodeAddrMode5FP16Operand() argument
2866 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode5FP16Operand()
2870 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5FP16Opc(ARM_AM::add, imm))); in DecodeAddrMode5FP16Operand()
2872 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5FP16Opc(ARM_AM::sub, imm))); in DecodeAddrMode5FP16Operand()
2877 static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, in DecodeAddrMode7Operand() argument
2880 return DecodeGPRRegisterClass(Inst, Val, Address, Decoder); in DecodeAddrMode7Operand()
2883 static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn, in DecodeT2BInstruction() argument
2904 true, 4, Inst, Decoder)) in DecodeT2BInstruction()
2905 Inst.addOperand(MCOperand::createImm(imm32)); in DecodeT2BInstruction()
2910 static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, in DecodeBranchImmInstruction() argument
2919 Inst.setOpcode(ARM::BLXi); in DecodeBranchImmInstruction()
2922 true, 4, Inst, Decoder)) in DecodeBranchImmInstruction()
2923 Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm))); in DecodeBranchImmInstruction()
2928 true, 4, Inst, Decoder)) in DecodeBranchImmInstruction()
2929 Inst.addOperand(MCOperand::createImm(SignExtend32<26>(imm))); in DecodeBranchImmInstruction()
2933 if (Inst.getOpcode() != ARM::BL) in DecodeBranchImmInstruction()
2934 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeBranchImmInstruction()
2940 static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, in DecodeAddrMode6Operand() argument
2948 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeAddrMode6Operand()
2951 Inst.addOperand(MCOperand::createImm(0)); in DecodeAddrMode6Operand()
2953 Inst.addOperand(MCOperand::createImm(4 << align)); in DecodeAddrMode6Operand()
2958 static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, in DecodeVLDInstruction() argument
2971 switch (Inst.getOpcode()) { in DecodeVLDInstruction()
2981 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLDInstruction()
2993 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLDInstruction()
2997 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLDInstruction()
3002 switch (Inst.getOpcode()) { in DecodeVLDInstruction()
3015 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder))) in DecodeVLDInstruction()
3030 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) in DecodeVLDInstruction()
3038 switch(Inst.getOpcode()) { in DecodeVLDInstruction()
3051 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) in DecodeVLDInstruction()
3066 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder))) in DecodeVLDInstruction()
3074 switch (Inst.getOpcode()) { in DecodeVLDInstruction()
3081 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder))) in DecodeVLDInstruction()
3090 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder))) in DecodeVLDInstruction()
3098 switch (Inst.getOpcode()) { in DecodeVLDInstruction()
3149 Inst.addOperand(MCOperand::createImm(0)); in DecodeVLDInstruction()
3163 if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder))) in DecodeVLDInstruction()
3171 if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder))) in DecodeVLDInstruction()
3175 switch (Inst.getOpcode()) { in DecodeVLDInstruction()
3184 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLDInstruction()
3217 !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLDInstruction()
3235 static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, in DecodeVLDST1Instruction() argument
3245 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) in DecodeVLDST1Instruction()
3246 : DecodeVSTInstruction(Inst, Insn, Address, Decoder); in DecodeVLDST1Instruction()
3249 static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, in DecodeVLDST2Instruction() argument
3261 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) in DecodeVLDST2Instruction()
3262 : DecodeVSTInstruction(Inst, Insn, Address, Decoder); in DecodeVLDST2Instruction()
3265 static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, in DecodeVLDST3Instruction() argument
3275 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) in DecodeVLDST3Instruction()
3276 : DecodeVSTInstruction(Inst, Insn, Address, Decoder); in DecodeVLDST3Instruction()
3279 static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, in DecodeVLDST4Instruction() argument
3286 return load ? DecodeVLDInstruction(Inst, Insn, Address, Decoder) in DecodeVLDST4Instruction()
3287 : DecodeVSTInstruction(Inst, Insn, Address, Decoder); in DecodeVLDST4Instruction()
3290 static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn, in DecodeVSTInstruction() argument
3303 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3356 Inst.addOperand(MCOperand::createImm(0)); in DecodeVSTInstruction()
3370 if (!Check(S, DecodeGPRRegisterClass(Inst, wb, Address, Decoder))) in DecodeVSTInstruction()
3378 if (!Check(S, DecodeAddrMode6Operand(Inst, Rn, Address, Decoder))) in DecodeVSTInstruction()
3382 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3385 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSTInstruction()
3387 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVSTInstruction()
3420 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3442 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVSTInstruction()
3454 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVSTInstruction()
3458 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVSTInstruction()
3463 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3476 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder))) in DecodeVSTInstruction()
3491 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) in DecodeVSTInstruction()
3499 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3512 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) in DecodeVSTInstruction()
3527 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+4)%32, Address, Decoder))) in DecodeVSTInstruction()
3535 switch (Inst.getOpcode()) { in DecodeVSTInstruction()
3542 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3)%32, Address, Decoder))) in DecodeVSTInstruction()
3551 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+6)%32, Address, Decoder))) in DecodeVSTInstruction()
3561 static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, in DecodeVLD1DupInstruction() argument
3577 switch (Inst.getOpcode()) { in DecodeVLD1DupInstruction()
3582 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD1DupInstruction()
3586 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD1DupInstruction()
3591 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD1DupInstruction()
3595 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD1DupInstruction()
3597 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD1DupInstruction()
3603 !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD1DupInstruction()
3609 static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, in DecodeVLD2DupInstruction() argument
3622 switch (Inst.getOpcode()) { in DecodeVLD2DupInstruction()
3627 if (!Check(S, DecodeDPairRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD2DupInstruction()
3634 if (!Check(S, DecodeDPairSpacedRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD2DupInstruction()
3638 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD2DupInstruction()
3644 Inst.addOperand(MCOperand::createImm(0)); in DecodeVLD2DupInstruction()
3646 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD2DupInstruction()
3648 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD2DupInstruction()
3651 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD2DupInstruction()
3658 static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, in DecodeVLD3DupInstruction() argument
3669 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD3DupInstruction()
3671 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder))) in DecodeVLD3DupInstruction()
3673 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder))) in DecodeVLD3DupInstruction()
3676 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD3DupInstruction()
3680 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD3DupInstruction()
3682 Inst.addOperand(MCOperand::createImm(0)); in DecodeVLD3DupInstruction()
3685 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD3DupInstruction()
3687 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD3DupInstruction()
3694 static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, in DecodeVLD4DupInstruction() argument
3720 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD4DupInstruction()
3722 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder))) in DecodeVLD4DupInstruction()
3724 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder))) in DecodeVLD4DupInstruction()
3726 if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder))) in DecodeVLD4DupInstruction()
3729 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD4DupInstruction()
3733 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD4DupInstruction()
3735 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD4DupInstruction()
3738 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD4DupInstruction()
3740 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD4DupInstruction()
3747 static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, in DecodeVMOVModImmInstruction() argument
3762 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVMOVModImmInstruction()
3765 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVMOVModImmInstruction()
3769 Inst.addOperand(MCOperand::createImm(imm)); in DecodeVMOVModImmInstruction()
3771 switch (Inst.getOpcode()) { in DecodeVMOVModImmInstruction()
3776 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVMOVModImmInstruction()
3783 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVMOVModImmInstruction()
3793 static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, in DecodeMVEModImmInstruction() argument
3807 if (cmode == 0xF && Inst.getOpcode() == ARM::MVE_VMVNimmi32) in DecodeMVEModImmInstruction()
3810 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEModImmInstruction()
3813 Inst.addOperand(MCOperand::createImm(imm)); in DecodeMVEModImmInstruction()
3815 Inst.addOperand(MCOperand::createImm(ARMVCC::None)); in DecodeMVEModImmInstruction()
3816 Inst.addOperand(MCOperand::createReg(0)); in DecodeMVEModImmInstruction()
3817 Inst.addOperand(MCOperand::createImm(0)); in DecodeMVEModImmInstruction()
3822 static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, in DecodeMVEVADCInstruction() argument
3829 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVADCInstruction()
3831 Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV)); in DecodeMVEVADCInstruction()
3835 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qn, Address, Decoder))) in DecodeMVEVADCInstruction()
3839 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMVEVADCInstruction()
3842 Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV)); in DecodeMVEVADCInstruction()
3843 Inst.addOperand(MCOperand::createImm(Qd)); in DecodeMVEVADCInstruction()
3848 static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, in DecodeVSHLMaxInstruction() argument
3859 if (!Check(S, DecodeQPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVSHLMaxInstruction()
3861 if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVSHLMaxInstruction()
3863 Inst.addOperand(MCOperand::createImm(8 << size)); in DecodeVSHLMaxInstruction()
3868 static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, in DecodeShiftRight8Imm() argument
3871 Inst.addOperand(MCOperand::createImm(8 - Val)); in DecodeShiftRight8Imm()
3875 static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, in DecodeShiftRight16Imm() argument
3878 Inst.addOperand(MCOperand::createImm(16 - Val)); in DecodeShiftRight16Imm()
3882 static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, in DecodeShiftRight32Imm() argument
3885 Inst.addOperand(MCOperand::createImm(32 - Val)); in DecodeShiftRight32Imm()
3889 static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, in DecodeShiftRight64Imm() argument
3892 Inst.addOperand(MCOperand::createImm(64 - Val)); in DecodeShiftRight64Imm()
3896 static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn, in DecodeTBLInstruction() argument
3909 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeTBLInstruction()
3912 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeTBLInstruction()
3916 switch (Inst.getOpcode()) { in DecodeTBLInstruction()
3919 if (!Check(S, DecodeDPairRegisterClass(Inst, Rn, Address, Decoder))) in DecodeTBLInstruction()
3923 if (!Check(S, DecodeDPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeTBLInstruction()
3927 if (!Check(S, DecodeDPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeTBLInstruction()
3933 static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, in DecodeThumbAddSpecialReg() argument
3941 if (!Check(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder))) in DecodeThumbAddSpecialReg()
3944 switch(Inst.getOpcode()) { in DecodeThumbAddSpecialReg()
3950 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSpecialReg()
3954 Inst.addOperand(MCOperand::createImm(imm)); in DecodeThumbAddSpecialReg()
3958 static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val, in DecodeThumbBROperand() argument
3962 true, 2, Inst, Decoder)) in DecodeThumbBROperand()
3963 Inst.addOperand(MCOperand::createImm(SignExtend32<12>(Val << 1))); in DecodeThumbBROperand()
3967 static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val, in DecodeT2BROperand() argument
3971 true, 4, Inst, Decoder)) in DecodeT2BROperand()
3972 Inst.addOperand(MCOperand::createImm(SignExtend32<21>(Val))); in DecodeT2BROperand()
3976 static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, in DecodeThumbCmpBROperand() argument
3980 true, 2, Inst, Decoder)) in DecodeThumbCmpBROperand()
3981 Inst.addOperand(MCOperand::createImm(Val << 1)); in DecodeThumbCmpBROperand()
3985 static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, in DecodeThumbAddrModeRR() argument
3993 if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeThumbAddrModeRR()
3995 if (!Check(S, DecodetGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeThumbAddrModeRR()
4001 static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, in DecodeThumbAddrModeIS() argument
4009 if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeThumbAddrModeIS()
4011 Inst.addOperand(MCOperand::createImm(imm)); in DecodeThumbAddrModeIS()
4016 static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, in DecodeThumbAddrModePC() argument
4021 Inst.addOperand(MCOperand::createImm(imm)); in DecodeThumbAddrModePC()
4027 static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, in DecodeThumbAddrModeSP() argument
4030 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddrModeSP()
4031 Inst.addOperand(MCOperand::createImm(Val)); in DecodeThumbAddrModeSP()
4036 static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, in DecodeT2AddrModeSOReg() argument
4046 switch (Inst.getOpcode()) { in DecodeT2AddrModeSOReg()
4057 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeSOReg()
4059 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeT2AddrModeSOReg()
4061 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2AddrModeSOReg()
4066 static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn, in DecodeT2LoadShift() argument
4081 switch (Inst.getOpcode()) { in DecodeT2LoadShift()
4083 Inst.setOpcode(ARM::t2LDRBpci); in DecodeT2LoadShift()
4086 Inst.setOpcode(ARM::t2LDRHpci); in DecodeT2LoadShift()
4089 Inst.setOpcode(ARM::t2LDRSHpci); in DecodeT2LoadShift()
4092 Inst.setOpcode(ARM::t2LDRSBpci); in DecodeT2LoadShift()
4095 Inst.setOpcode(ARM::t2LDRpci); in DecodeT2LoadShift()
4098 Inst.setOpcode(ARM::t2PLDpci); in DecodeT2LoadShift()
4101 Inst.setOpcode(ARM::t2PLIpci); in DecodeT2LoadShift()
4107 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); in DecodeT2LoadShift()
4111 switch (Inst.getOpcode()) { in DecodeT2LoadShift()
4115 Inst.setOpcode(ARM::t2PLDWs); in DecodeT2LoadShift()
4118 Inst.setOpcode(ARM::t2PLIs); in DecodeT2LoadShift()
4125 switch (Inst.getOpcode()) { in DecodeT2LoadShift()
4137 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LoadShift()
4144 if (!Check(S, DecodeT2AddrModeSOReg(Inst, addrmode, Address, Decoder))) in DecodeT2LoadShift()
4150 static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, in DecodeT2LoadImm8() argument
4170 switch (Inst.getOpcode()) { in DecodeT2LoadImm8()
4172 Inst.setOpcode(ARM::t2LDRpci); in DecodeT2LoadImm8()
4175 Inst.setOpcode(ARM::t2LDRBpci); in DecodeT2LoadImm8()
4178 Inst.setOpcode(ARM::t2LDRSBpci); in DecodeT2LoadImm8()
4181 Inst.setOpcode(ARM::t2LDRHpci); in DecodeT2LoadImm8()
4184 Inst.setOpcode(ARM::t2LDRSHpci); in DecodeT2LoadImm8()
4187 Inst.setOpcode(ARM::t2PLDpci); in DecodeT2LoadImm8()
4190 Inst.setOpcode(ARM::t2PLIpci); in DecodeT2LoadImm8()
4195 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); in DecodeT2LoadImm8()
4199 switch (Inst.getOpcode()) { in DecodeT2LoadImm8()
4204 Inst.setOpcode(ARM::t2PLDWi8); in DecodeT2LoadImm8()
4207 Inst.setOpcode(ARM::t2PLIi8); in DecodeT2LoadImm8()
4214 switch (Inst.getOpcode()) { in DecodeT2LoadImm8()
4226 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LoadImm8()
4230 if (!Check(S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder))) in DecodeT2LoadImm8()
4235 static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, in DecodeT2LoadImm12() argument
4252 switch (Inst.getOpcode()) { in DecodeT2LoadImm12()
4254 Inst.setOpcode(ARM::t2LDRpci); in DecodeT2LoadImm12()
4257 Inst.setOpcode(ARM::t2LDRHpci); in DecodeT2LoadImm12()
4260 Inst.setOpcode(ARM::t2LDRSHpci); in DecodeT2LoadImm12()
4263 Inst.setOpcode(ARM::t2LDRBpci); in DecodeT2LoadImm12()
4266 Inst.setOpcode(ARM::t2LDRSBpci); in DecodeT2LoadImm12()
4269 Inst.setOpcode(ARM::t2PLDpci); in DecodeT2LoadImm12()
4272 Inst.setOpcode(ARM::t2PLIpci); in DecodeT2LoadImm12()
4277 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); in DecodeT2LoadImm12()
4281 switch (Inst.getOpcode()) { in DecodeT2LoadImm12()
4285 Inst.setOpcode(ARM::t2PLDWi12); in DecodeT2LoadImm12()
4288 Inst.setOpcode(ARM::t2PLIi12); in DecodeT2LoadImm12()
4295 switch (Inst.getOpcode()) { in DecodeT2LoadImm12()
4307 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LoadImm12()
4311 if (!Check(S, DecodeT2AddrModeImm12(Inst, imm, Address, Decoder))) in DecodeT2LoadImm12()
4316 static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeT2LoadT() argument
4326 switch (Inst.getOpcode()) { in DecodeT2LoadT()
4328 Inst.setOpcode(ARM::t2LDRpci); in DecodeT2LoadT()
4331 Inst.setOpcode(ARM::t2LDRBpci); in DecodeT2LoadT()
4334 Inst.setOpcode(ARM::t2LDRHpci); in DecodeT2LoadT()
4337 Inst.setOpcode(ARM::t2LDRSBpci); in DecodeT2LoadT()
4340 Inst.setOpcode(ARM::t2LDRSHpci); in DecodeT2LoadT()
4345 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); in DecodeT2LoadT()
4348 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LoadT()
4350 if (!Check(S, DecodeT2AddrModeImm8(Inst, imm, Address, Decoder))) in DecodeT2LoadT()
4355 static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, in DecodeT2LoadLabel() argument
4370 switch (Inst.getOpcode()) { in DecodeT2LoadLabel()
4373 Inst.setOpcode(ARM::t2PLDpci); in DecodeT2LoadLabel()
4376 Inst.setOpcode(ARM::t2PLIpci); in DecodeT2LoadLabel()
4385 switch(Inst.getOpcode()) { in DecodeT2LoadLabel()
4393 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LoadLabel()
4404 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2LoadLabel()
4409 static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeT2Imm8S4() argument
4412 Inst.addOperand(MCOperand::createImm(INT32_MIN)); in DecodeT2Imm8S4()
4417 Inst.addOperand(MCOperand::createImm(imm * 4)); in DecodeT2Imm8S4()
4423 static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeT2Imm7S4() argument
4426 Inst.addOperand(MCOperand::createImm(INT32_MIN)); in DecodeT2Imm7S4()
4432 Inst.addOperand(MCOperand::createImm(imm * 4)); in DecodeT2Imm7S4()
4438 static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm8s4() argument
4446 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm8s4()
4448 if (!Check(S, DecodeT2Imm8S4(Inst, imm, Address, Decoder))) in DecodeT2AddrModeImm8s4()
4454 static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm7s4() argument
4462 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm7s4()
4464 if (!Check(S, DecodeT2Imm7S4(Inst, imm, Address, Decoder))) in DecodeT2AddrModeImm7s4()
4470 static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm0_1020s4() argument
4478 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm0_1020s4()
4481 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2AddrModeImm0_1020s4()
4486 static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeT2Imm8() argument
4493 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2Imm8()
4499 static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeT2Imm7() argument
4508 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2Imm7()
4513 static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm8() argument
4522 switch (Inst.getOpcode()) { in DecodeT2AddrModeImm8()
4537 switch (Inst.getOpcode()) { in DecodeT2AddrModeImm8()
4552 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm8()
4554 if (!Check(S, DecodeT2Imm8(Inst, imm, Address, Decoder))) in DecodeT2AddrModeImm8()
4561 static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, in DecodeTAddrModeImm7() argument
4569 if (!Check(S, DecodetGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeTAddrModeImm7()
4571 if (!Check(S, DecodeT2Imm7<shift>(Inst, imm, Address, Decoder))) in DecodeTAddrModeImm7()
4578 static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm7() argument
4586 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm7()
4588 } else if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm7()
4590 if (!Check(S, DecodeT2Imm7<shift>(Inst, imm, Address, Decoder))) in DecodeT2AddrModeImm7()
4596 static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn, in DecodeT2LdStPre() argument
4609 switch (Inst.getOpcode()) { in DecodeT2LdStPre()
4612 Inst.setOpcode(ARM::t2LDRpci); in DecodeT2LdStPre()
4616 Inst.setOpcode(ARM::t2LDRBpci); in DecodeT2LdStPre()
4620 Inst.setOpcode(ARM::t2LDRHpci); in DecodeT2LdStPre()
4625 Inst.setOpcode(ARM::t2PLIpci); in DecodeT2LdStPre()
4627 Inst.setOpcode(ARM::t2LDRSBpci); in DecodeT2LdStPre()
4631 Inst.setOpcode(ARM::t2LDRSHpci); in DecodeT2LdStPre()
4636 return DecodeT2LoadLabel(Inst, Insn, Address, Decoder); in DecodeT2LdStPre()
4640 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2LdStPre()
4644 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LdStPre()
4648 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2LdStPre()
4652 if (!Check(S, DecodeT2AddrModeImm8(Inst, addr, Address, Decoder))) in DecodeT2LdStPre()
4658 static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, in DecodeT2AddrModeImm12() argument
4667 switch (Inst.getOpcode()) { in DecodeT2AddrModeImm12()
4678 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2AddrModeImm12()
4680 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2AddrModeImm12()
4685 static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, in DecodeThumbAddSPImm() argument
4690 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSPImm()
4691 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSPImm()
4692 Inst.addOperand(MCOperand::createImm(imm)); in DecodeThumbAddSPImm()
4697 static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, in DecodeThumbAddSPReg() argument
4702 if (Inst.getOpcode() == ARM::tADDrSP) { in DecodeThumbAddSPReg()
4706 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) in DecodeThumbAddSPReg()
4708 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSPReg()
4709 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) in DecodeThumbAddSPReg()
4711 } else if (Inst.getOpcode() == ARM::tADDspr) { in DecodeThumbAddSPReg()
4714 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSPReg()
4715 Inst.addOperand(MCOperand::createReg(ARM::SP)); in DecodeThumbAddSPReg()
4716 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeThumbAddSPReg()
4723 static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn, in DecodeThumbCPS() argument
4729 Inst.addOperand(MCOperand::createImm(imod)); in DecodeThumbCPS()
4730 Inst.addOperand(MCOperand::createImm(flags)); in DecodeThumbCPS()
4735 static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn, in DecodePostIdxReg() argument
4742 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rm, Address, Decoder))) in DecodePostIdxReg()
4744 Inst.addOperand(MCOperand::createImm(add)); in DecodePostIdxReg()
4749 static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, in DecodeMveAddrModeRQ() argument
4756 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeMveAddrModeRQ()
4758 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMveAddrModeRQ()
4765 static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, in DecodeMveAddrModeQ() argument
4772 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMveAddrModeQ()
4783 Inst.addOperand(MCOperand::createImm(imm)); in DecodeMveAddrModeQ()
4788 static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, in DecodeThumbBLXOffset() argument
4808 true, 4, Inst, Decoder)) in DecodeThumbBLXOffset()
4809 Inst.addOperand(MCOperand::createImm(imm32)); in DecodeThumbBLXOffset()
4813 static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val, in DecodeCoprocessor() argument
4825 Inst.addOperand(MCOperand::createImm(Val)); in DecodeCoprocessor()
4829 static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, in DecodeThumbTableBranch() argument
4840 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeThumbTableBranch()
4842 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeThumbTableBranch()
4847 static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, in DecodeThumb2BCCInstruction() argument
4859 Inst.setOpcode(ARM::t2DSB); in DecodeThumb2BCCInstruction()
4862 Inst.setOpcode(ARM::t2DMB); in DecodeThumb2BCCInstruction()
4865 Inst.setOpcode(ARM::t2ISB); in DecodeThumb2BCCInstruction()
4870 return DecodeMemBarrierOption(Inst, imm, Address, Decoder); in DecodeThumb2BCCInstruction()
4879 if (!Check(S, DecodeT2BROperand(Inst, brtarget, Address, Decoder))) in DecodeThumb2BCCInstruction()
4881 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeThumb2BCCInstruction()
4890 static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeT2SOImm() argument
4898 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2SOImm()
4901 Inst.addOperand(MCOperand::createImm((imm << 16) | imm)); in DecodeT2SOImm()
4904 Inst.addOperand(MCOperand::createImm((imm << 24) | (imm << 8))); in DecodeT2SOImm()
4907 Inst.addOperand(MCOperand::createImm((imm << 24) | (imm << 16) | in DecodeT2SOImm()
4915 Inst.addOperand(MCOperand::createImm(imm)); in DecodeT2SOImm()
4921 static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, in DecodeThumbBCCTargetOperand() argument
4925 true, 2, Inst, Decoder)) in DecodeThumbBCCTargetOperand()
4926 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(Val << 1))); in DecodeThumbBCCTargetOperand()
4930 static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, in DecodeThumbBLTargetOperand() argument
4949 true, 4, Inst, Decoder)) in DecodeThumbBLTargetOperand()
4950 Inst.addOperand(MCOperand::createImm(imm32)); in DecodeThumbBLTargetOperand()
4954 static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val, in DecodeMemBarrierOption() argument
4960 Inst.addOperand(MCOperand::createImm(Val)); in DecodeMemBarrierOption()
4964 static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, in DecodeInstSyncBarrierOption() argument
4970 Inst.addOperand(MCOperand::createImm(Val)); in DecodeInstSyncBarrierOption()
4974 static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeMSRMask() argument
5046 if (Inst.getOpcode() == ARM::t2MSR_M) { in DecodeMSRMask()
5071 Inst.addOperand(MCOperand::createImm(Val)); in DecodeMSRMask()
5075 static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val, in DecodeBankedReg() argument
5087 Inst.addOperand(MCOperand::createImm(Val)); in DecodeBankedReg()
5091 static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, in DecodeDoubleRegLoad() argument
5103 if (!Check(S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder))) in DecodeDoubleRegLoad()
5105 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeDoubleRegLoad()
5107 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeDoubleRegLoad()
5113 static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, in DecodeDoubleRegStore() argument
5123 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rd, Address, Decoder))) in DecodeDoubleRegStore()
5129 if (!Check(S, DecodeGPRPairRegisterClass(Inst, Rt, Address, Decoder))) in DecodeDoubleRegStore()
5131 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeDoubleRegStore()
5133 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeDoubleRegStore()
5139 static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn, in DecodeLDRPreImm() argument
5153 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeLDRPreImm()
5155 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeLDRPreImm()
5157 if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder))) in DecodeLDRPreImm()
5159 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeLDRPreImm()
5165 static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn, in DecodeLDRPreReg() argument
5181 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeLDRPreReg()
5183 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeLDRPreReg()
5185 if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder))) in DecodeLDRPreReg()
5187 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeLDRPreReg()
5193 static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn, in DecodeSTRPreImm() argument
5207 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSTRPreImm()
5209 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeSTRPreImm()
5211 if (!Check(S, DecodeAddrModeImm12Operand(Inst, imm, Address, Decoder))) in DecodeSTRPreImm()
5213 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeSTRPreImm()
5219 static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn, in DecodeSTRPreReg() argument
5233 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSTRPreReg()
5235 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeSTRPreReg()
5237 if (!Check(S, DecodeSORegMemOperand(Inst, imm, Address, Decoder))) in DecodeSTRPreReg()
5239 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeSTRPreReg()
5245 static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVLD1LN() argument
5288 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD1LN()
5291 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD1LN()
5294 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD1LN()
5296 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD1LN()
5299 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD1LN()
5302 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD1LN()
5305 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD1LN()
5307 Inst.addOperand(MCOperand::createImm(index)); in DecodeVLD1LN()
5312 static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVST1LN() argument
5356 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST1LN()
5359 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST1LN()
5361 Inst.addOperand(MCOperand::createImm(align)); in DecodeVST1LN()
5364 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVST1LN()
5367 Inst.addOperand(MCOperand::createReg(0)); in DecodeVST1LN()
5370 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVST1LN()
5372 Inst.addOperand(MCOperand::createImm(index)); in DecodeVST1LN()
5377 static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVLD2LN() argument
5416 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD2LN()
5418 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD2LN()
5421 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD2LN()
5424 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD2LN()
5426 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD2LN()
5429 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD2LN()
5432 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD2LN()
5435 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD2LN()
5437 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD2LN()
5439 Inst.addOperand(MCOperand::createImm(index)); in DecodeVLD2LN()
5444 static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVST2LN() argument
5484 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST2LN()
5487 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST2LN()
5489 Inst.addOperand(MCOperand::createImm(align)); in DecodeVST2LN()
5492 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVST2LN()
5495 Inst.addOperand(MCOperand::createReg(0)); in DecodeVST2LN()
5498 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVST2LN()
5500 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVST2LN()
5502 Inst.addOperand(MCOperand::createImm(index)); in DecodeVST2LN()
5507 static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVLD3LN() argument
5544 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD3LN()
5546 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD3LN()
5548 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVLD3LN()
5552 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD3LN()
5555 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD3LN()
5557 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD3LN()
5560 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD3LN()
5563 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD3LN()
5566 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD3LN()
5568 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD3LN()
5570 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVLD3LN()
5572 Inst.addOperand(MCOperand::createImm(index)); in DecodeVLD3LN()
5577 static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVST3LN() argument
5615 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST3LN()
5618 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST3LN()
5620 Inst.addOperand(MCOperand::createImm(align)); in DecodeVST3LN()
5623 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVST3LN()
5626 Inst.addOperand(MCOperand::createReg(0)); in DecodeVST3LN()
5629 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVST3LN()
5631 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVST3LN()
5633 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVST3LN()
5635 Inst.addOperand(MCOperand::createImm(index)); in DecodeVST3LN()
5640 static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVLD4LN() argument
5684 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD4LN()
5686 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD4LN()
5688 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVLD4LN()
5690 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) in DecodeVLD4LN()
5694 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD4LN()
5697 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVLD4LN()
5699 Inst.addOperand(MCOperand::createImm(align)); in DecodeVLD4LN()
5702 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVLD4LN()
5705 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD4LN()
5708 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVLD4LN()
5710 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVLD4LN()
5712 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVLD4LN()
5714 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) in DecodeVLD4LN()
5716 Inst.addOperand(MCOperand::createImm(index)); in DecodeVLD4LN()
5721 static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVST4LN() argument
5766 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST4LN()
5769 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVST4LN()
5771 Inst.addOperand(MCOperand::createImm(align)); in DecodeVST4LN()
5774 if (!Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeVST4LN()
5777 Inst.addOperand(MCOperand::createReg(0)); in DecodeVST4LN()
5780 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder))) in DecodeVST4LN()
5782 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+inc, Address, Decoder))) in DecodeVST4LN()
5784 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+2*inc, Address, Decoder))) in DecodeVST4LN()
5786 if (!Check(S, DecodeDPRRegisterClass(Inst, Rd+3*inc, Address, Decoder))) in DecodeVST4LN()
5788 Inst.addOperand(MCOperand::createImm(index)); in DecodeVST4LN()
5793 static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVMOVSRR() argument
5805 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder))) in DecodeVMOVSRR()
5807 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder))) in DecodeVMOVSRR()
5809 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder))) in DecodeVMOVSRR()
5811 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder))) in DecodeVMOVSRR()
5813 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeVMOVSRR()
5819 static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVMOVRRS() argument
5831 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt , Address, Decoder))) in DecodeVMOVRRS()
5833 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2 , Address, Decoder))) in DecodeVMOVRRS()
5835 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm , Address, Decoder))) in DecodeVMOVRRS()
5837 if (!Check(S, DecodeSPRRegisterClass(Inst, Rm+1, Address, Decoder))) in DecodeVMOVRRS()
5839 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeVMOVRRS()
5845 static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeIT() argument
5869 Inst.addOperand(MCOperand::createImm(pred)); in DecodeIT()
5870 Inst.addOperand(MCOperand::createImm(mask)); in DecodeIT()
5874 static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, in DecodeT2LDRDPreInstruction() argument
5896 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2LDRDPreInstruction()
5899 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder))) in DecodeT2LDRDPreInstruction()
5902 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2LDRDPreInstruction()
5905 if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder))) in DecodeT2LDRDPreInstruction()
5911 static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, in DecodeT2STRDPreInstruction() argument
5931 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeT2STRDPreInstruction()
5934 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeT2STRDPreInstruction()
5937 if (!Check(S, DecoderGPRRegisterClass(Inst, Rt2, Address, Decoder))) in DecodeT2STRDPreInstruction()
5940 if (!Check(S, DecodeT2AddrModeImm8s4(Inst, addr, Address, Decoder))) in DecodeT2STRDPreInstruction()
5946 static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, in DecodeT2Adr() argument
5952 assert(Inst.getNumOperands() == 0 && "We should receive an empty Inst"); in DecodeT2Adr()
5953 DecodeStatus S = DecoderGPRRegisterClass(Inst, Rd, Address, Decoder); in DecodeT2Adr()
5963 Inst.setOpcode(ARM::t2SUBri12); in DecodeT2Adr()
5964 Inst.addOperand(MCOperand::createReg(ARM::PC)); in DecodeT2Adr()
5968 Inst.addOperand(MCOperand::createImm(Val)); in DecodeT2Adr()
5972 static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, in DecodeT2ShifterImmOperand() argument
5979 Inst.addOperand(MCOperand::createImm(Val)); in DecodeT2ShifterImmOperand()
5983 static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeSwap() argument
5991 return DecodeCPSInstruction(Inst, Insn, Address, Decoder); in DecodeSwap()
5998 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) in DecodeSwap()
6000 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) in DecodeSwap()
6002 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSwap()
6004 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeSwap()
6010 static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVCVTD() argument
6030 Inst.setOpcode(ARM::VMOVv2f32); in DecodeVCVTD()
6035 Inst.setOpcode(ARM::VMOVv1i64); in DecodeVCVTD()
6037 Inst.setOpcode(ARM::VMOVv8i8); in DecodeVCVTD()
6042 Inst.setOpcode(ARM::VMVNv2i32); in DecodeVCVTD()
6044 Inst.setOpcode(ARM::VMOVv2i32); in DecodeVCVTD()
6049 Inst.setOpcode(ARM::VMVNv2i32); in DecodeVCVTD()
6051 Inst.setOpcode(ARM::VMOVv2i32); in DecodeVCVTD()
6055 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder); in DecodeVCVTD()
6060 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeVCVTD()
6062 if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeVCVTD()
6064 Inst.addOperand(MCOperand::createImm(64 - imm)); in DecodeVCVTD()
6069 static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVCVTQ() argument
6089 Inst.setOpcode(ARM::VMOVv4f32); in DecodeVCVTQ()
6094 Inst.setOpcode(ARM::VMOVv2i64); in DecodeVCVTQ()
6096 Inst.setOpcode(ARM::VMOVv16i8); in DecodeVCVTQ()
6101 Inst.setOpcode(ARM::VMVNv4i32); in DecodeVCVTQ()
6103 Inst.setOpcode(ARM::VMOVv4i32); in DecodeVCVTQ()
6108 Inst.setOpcode(ARM::VMVNv4i32); in DecodeVCVTQ()
6110 Inst.setOpcode(ARM::VMOVv4i32); in DecodeVCVTQ()
6114 return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder); in DecodeVCVTQ()
6119 if (!Check(S, DecodeQPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeVCVTQ()
6121 if (!Check(S, DecodeQPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeVCVTQ()
6123 Inst.addOperand(MCOperand::createImm(64 - imm)); in DecodeVCVTQ()
6129 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn, in DecodeNEONComplexLane64Instruction() argument
6145 if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder))) in DecodeNEONComplexLane64Instruction()
6147 if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder))) in DecodeNEONComplexLane64Instruction()
6149 if (!Check(S, DestRegDecoder(Inst, Vn, Address, Decoder))) in DecodeNEONComplexLane64Instruction()
6151 if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeNEONComplexLane64Instruction()
6155 Inst.addOperand(MCOperand::createImm(0)); in DecodeNEONComplexLane64Instruction()
6156 Inst.addOperand(MCOperand::createImm(rotate)); in DecodeNEONComplexLane64Instruction()
6161 static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeLDR() argument
6174 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) in DecodeLDR()
6176 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeLDR()
6178 if (!Check(S, DecodeAddrMode7Operand(Inst, Rn, Address, Decoder))) in DecodeLDR()
6180 if (!Check(S, DecodePostIdxReg(Inst, Rm, Address, Decoder))) in DecodeLDR()
6182 if (!Check(S, DecodePredicateOperand(Inst, Cond, Address, Decoder))) in DecodeLDR()
6188 static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, in DecoderForMRRC2AndMCRR2() argument
6215 if (Inst.getOpcode() == ARM::MRRC2) { in DecoderForMRRC2AndMCRR2()
6216 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) in DecoderForMRRC2AndMCRR2()
6218 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) in DecoderForMRRC2AndMCRR2()
6221 Inst.addOperand(MCOperand::createImm(cop)); in DecoderForMRRC2AndMCRR2()
6222 Inst.addOperand(MCOperand::createImm(opc1)); in DecoderForMRRC2AndMCRR2()
6223 if (Inst.getOpcode() == ARM::MCRR2) { in DecoderForMRRC2AndMCRR2()
6224 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder))) in DecoderForMRRC2AndMCRR2()
6226 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rt2, Address, Decoder))) in DecoderForMRRC2AndMCRR2()
6229 Inst.addOperand(MCOperand::createImm(CRm)); in DecoderForMRRC2AndMCRR2()
6234 static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, in DecodeForVMRSandVMSR() argument
6243 switch (Inst.getOpcode()) { in DecodeForVMRSandVMSR()
6245 Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV)); in DecodeForVMRSandVMSR()
6248 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeForVMRSandVMSR()
6252 if (Inst.getOpcode() != ARM::FMSTAT) { in DecodeForVMRSandVMSR()
6258 Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)); in DecodeForVMRSandVMSR()
6260 Check(S, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder)); in DecodeForVMRSandVMSR()
6264 switch (Inst.getOpcode()) { in DecodeForVMRSandVMSR()
6266 Inst.addOperand(MCOperand::createReg(ARM::FPSCR_NZCV)); in DecodeForVMRSandVMSR()
6269 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeForVMRSandVMSR()
6274 Inst.addOperand(MCOperand::createImm(ARMCC::AL)); in DecodeForVMRSandVMSR()
6275 Inst.addOperand(MCOperand::createReg(0)); in DecodeForVMRSandVMSR()
6278 if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder))) in DecodeForVMRSandVMSR()
6286 static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val, in DecodeBFLabelOperand() argument
6299 if (!tryAddingSymbolicOperand(Address, Address + DecVal + 4, true, 4, Inst, in DecodeBFLabelOperand()
6301 Inst.addOperand(MCOperand::createImm(isNeg ? -DecVal : DecVal)); in DecodeBFLabelOperand()
6305 static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, in DecodeBFAfterTargetOperand() argument
6309 uint64_t LocImm = Inst.getOperand(0).getImm(); in DecodeBFAfterTargetOperand()
6311 if (!tryAddingSymbolicOperand(Address, Address + Val + 4, true, 4, Inst, in DecodeBFAfterTargetOperand()
6313 Inst.addOperand(MCOperand::createImm(Val)); in DecodeBFAfterTargetOperand()
6317 static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val, in DecodePredNoALOperand() argument
6322 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredNoALOperand()
6326 static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeLOLoop() argument
6330 if (Inst.getOpcode() == ARM::MVE_LCTP) in DecodeLOLoop()
6335 switch (Inst.getOpcode()) { in DecodeLOLoop()
6338 Inst.addOperand(MCOperand::createReg(ARM::LR)); in DecodeLOLoop()
6339 Inst.addOperand(MCOperand::createReg(ARM::LR)); in DecodeLOLoop()
6343 Inst, Imm, Address, Decoder))) in DecodeLOLoop()
6351 Inst.addOperand(MCOperand::createReg(ARM::LR)); in DecodeLOLoop()
6353 DecoderGPRRegisterClass(Inst, fieldFromInstruction(Insn, 16, 4), in DecodeLOLoop()
6356 Inst, Imm, Address, Decoder))) in DecodeLOLoop()
6375 Inst.setOpcode(ARM::MVE_LCTP); in DecodeLOLoop()
6377 Inst.addOperand(MCOperand::createReg(ARM::LR)); in DecodeLOLoop()
6378 if (!Check(S, DecoderGPRRegisterClass(Inst, in DecodeLOLoop()
6388 static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val, in DecodeLongShiftOperand() argument
6396 Inst.addOperand(MCOperand::createImm(Val)); in DecodeLongShiftOperand()
6401 static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPROddRegisterClass() argument
6408 Inst.addOperand(MCOperand::createReg(Register)); in DecodetGPROddRegisterClass()
6412 static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPREvenRegisterClass() argument
6419 Inst.addOperand(MCOperand::createReg(Register)); in DecodetGPREvenRegisterClass()
6424 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithAPSR_NZCVnospRegisterClass() argument
6428 Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSR_NZCVnospRegisterClass()
6433 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRwithAPSR_NZCVnospRegisterClass()
6441 static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeVSCCLRM() argument
6445 Inst.addOperand(MCOperand::createImm(ARMCC::AL)); in DecodeVSCCLRM()
6446 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSCCLRM()
6447 if (Inst.getOpcode() == ARM::VSCCLRMD) { in DecodeVSCCLRM()
6451 if (!Check(S, DecodeDPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM()
6458 if (!Check(S, DecodeSPRRegListOperand(Inst, reglist, Address, Decoder))) { in DecodeVSCCLRM()
6462 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeVSCCLRM()
6467 static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeMQPRRegisterClass() argument
6474 Inst.addOperand(MCOperand::createReg(Register)); in DecodeMQPRRegisterClass()
6483 static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeMQQPRRegisterClass() argument
6490 Inst.addOperand(MCOperand::createReg(Register)); in DecodeMQQPRRegisterClass()
6499 static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeMQQQQPRRegisterClass() argument
6506 Inst.addOperand(MCOperand::createReg(Register)); in DecodeMQQQQPRRegisterClass()
6510 static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, in DecodeVPTMaskOperand() argument
6536 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeVPTMaskOperand()
6541 static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned RegNo, in DecodeVpredROperand() argument
6555 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeRestrictedIPredicateOperand() argument
6557 Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::EQ : ARMCC::NE)); in DecodeRestrictedIPredicateOperand()
6562 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeRestrictedSPredicateOperand() argument
6579 Inst.addOperand(MCOperand::createImm(Code)); in DecodeRestrictedSPredicateOperand()
6584 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeRestrictedUPredicateOperand() argument
6586 Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::HS : ARMCC::HI)); in DecodeRestrictedUPredicateOperand()
6591 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeRestrictedFPPredicateOperand() argument
6617 Inst.addOperand(MCOperand::createImm(Code)); in DecodeRestrictedFPPredicateOperand()
6621 static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Val, in DecodeVCVTImmOperand() argument
6628 switch (Inst.getOpcode()) { in DecodeVCVTImmOperand()
6645 Inst.addOperand(MCOperand::createImm(64 - Val)); in DecodeVCVTImmOperand()
6665 static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, in DecodeVSTRVLDR_SYSREG() argument
6668 switch (Inst.getOpcode()) { in DecodeVSTRVLDR_SYSREG()
6689 if (unsigned Sysreg = FixedRegForVSTRVLDR_SYSREG(Inst.getOpcode())) in DecodeVSTRVLDR_SYSREG()
6690 Inst.addOperand(MCOperand::createReg(Sysreg)); in DecodeVSTRVLDR_SYSREG()
6696 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Rn, Address, Decoder))) in DecodeVSTRVLDR_SYSREG()
6699 if (!Check(S, DecodeT2AddrModeImm7s4(Inst, addr, Address, Decoder))) in DecodeVSTRVLDR_SYSREG()
6702 Inst.addOperand(MCOperand::createImm(ARMCC::AL)); in DecodeVSTRVLDR_SYSREG()
6703 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSTRVLDR_SYSREG()
6709 DecodeMVE_MEM_pre(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeMVE_MEM_pre() argument
6718 if (!Check(S, RnDecoder(Inst, Rn, Address, Decoder))) in DecodeMVE_MEM_pre()
6720 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVE_MEM_pre()
6722 if (!Check(S, AddrDecoder(Inst, addr, Address, Decoder))) in DecodeMVE_MEM_pre()
6729 static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, in DecodeMVE_MEM_1_pre() argument
6732 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, in DecodeMVE_MEM_1_pre()
6739 static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, in DecodeMVE_MEM_2_pre() argument
6742 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, in DecodeMVE_MEM_2_pre()
6749 static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, in DecodeMVE_MEM_3_pre() argument
6752 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, in DecodeMVE_MEM_3_pre()
6759 static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, in DecodePowerTwoOperand() argument
6767 Inst.addOperand(MCOperand::createImm(1LL << Val)); in DecodePowerTwoOperand()
6773 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, in DecodeMVEPairVectorIndexOperand() argument
6777 Inst.addOperand(MCOperand::createImm(start + Val)); in DecodeMVEPairVectorIndexOperand()
6782 static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, in DecodeMVEVMOVQtoDReg() argument
6792 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
6794 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
6796 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
6798 if (!Check(S, DecodeMVEPairVectorIndexOperand<2>(Inst, index, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
6800 if (!Check(S, DecodeMVEPairVectorIndexOperand<0>(Inst, index, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
6806 static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, in DecodeMVEVMOVDRegtoQ() argument
6816 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6818 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6820 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6822 if (!Check(S, DecodeGPRRegisterClass(Inst, Rt2, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6824 if (!Check(S, DecodeMVEPairVectorIndexOperand<2>(Inst, index, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6826 if (!Check(S, DecodeMVEPairVectorIndexOperand<0>(Inst, index, Address, Decoder))) in DecodeMVEVMOVDRegtoQ()
6833 DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMVEOverlappingLongShift() argument
6849 switch (Inst.getOpcode()) { in DecodeMVEOverlappingLongShift()
6852 Inst.setOpcode(ARM::MVE_SQRSHR); in DecodeMVEOverlappingLongShift()
6856 Inst.setOpcode(ARM::MVE_UQRSHL); in DecodeMVEOverlappingLongShift()
6863 if (!Check(S, DecoderGPRRegisterClass(Inst, Rda, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6867 if (!Check(S, DecoderGPRRegisterClass(Inst, Rda, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6871 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6887 if (!Check(S, DecodetGPREvenRegisterClass(Inst, RdaLo, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6889 if (!Check(S, DecodetGPROddRegisterClass(Inst, RdaHi, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6893 if (!Check(S, DecodetGPREvenRegisterClass(Inst, RdaLo, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6895 if (!Check(S, DecodetGPROddRegisterClass(Inst, RdaHi, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6899 if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeMVEOverlappingLongShift()
6902 if (Inst.getOpcode() == ARM::MVE_SQRSHRL || in DecodeMVEOverlappingLongShift()
6903 Inst.getOpcode() == ARM::MVE_UQRSHLL) { in DecodeMVEOverlappingLongShift()
6906 Inst.addOperand(MCOperand::createImm(Saturate)); in DecodeMVEOverlappingLongShift()
6912 static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, in DecodeMVEVCVTt1fp() argument
6922 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVCVTt1fp()
6924 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMVEVCVTt1fp()
6926 if (!Check(S, DecodeVCVTImmOperand(Inst, imm6, Address, Decoder))) in DecodeMVEVCVTt1fp()
6933 static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMVEVCMP() argument
6936 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVCMP()
6938 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qn, Address, Decoder))) in DecodeMVEVCMP()
6948 if (!Check(S, DecodeGPRwithZRRegisterClass(Inst, Rm, Address, Decoder))) in DecodeMVEVCMP()
6956 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qm, Address, Decoder))) in DecodeMVEVCMP()
6960 if (!Check(S, predicate_decoder(Inst, fc, Address, Decoder))) in DecodeMVEVCMP()
6963 Inst.addOperand(MCOperand::createImm(ARMVCC::None)); in DecodeMVEVCMP()
6964 Inst.addOperand(MCOperand::createReg(0)); in DecodeMVEVCMP()
6965 Inst.addOperand(MCOperand::createImm(0)); in DecodeMVEVCMP()
6970 static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMveVCTP() argument
6973 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMveVCTP()
6975 if (!Check(S, DecoderGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeMveVCTP()
6980 static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, in DecodeMVEVPNOT() argument
6984 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVPNOT()
6985 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVPNOT()
6989 static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, in DecodeT2AddSubSPImm() argument
7007 DecodeGPRspRegisterClass(Inst, Rd, Address, Decoder))) || // dst in DecodeT2AddSubSPImm()
7008 (!Check(DS, DecodeGPRspRegisterClass(Inst, Rn, Address, Decoder)))) in DecodeT2AddSubSPImm()
7011 Inst.setOpcode(sign1 ? ARM::t2SUBspImm12 : ARM::t2ADDspImm12); in DecodeT2AddSubSPImm()
7012 Inst.addOperand(MCOperand::createImm(Imm12)); // zext imm12 in DecodeT2AddSubSPImm()
7014 Inst.setOpcode(sign1 ? ARM::t2SUBspImm : ARM::t2ADDspImm); in DecodeT2AddSubSPImm()
7015 if (!Check(DS, DecodeT2SOImm(Inst, Imm12, Address, Decoder))) // imm12 in DecodeT2AddSubSPImm()
7017 if (!Check(DS, DecodeCCOutOperand(Inst, S, Address, Decoder))) // cc_out in DecodeT2AddSubSPImm()