317   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()  function in __anon2aa686d00111::ARMAsmParser
318   bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; }  in inExplicitITBlock()
319   bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; }  in inImplicitITBlock()
326     if (!inITBlock()) return;  in forwardITPosition()
378     return inITBlock() && (ITState.Mask & 1);  in isITBlockFull()
401     assert(!inITBlock());  in startImplicitITBlock()
413     assert(!inITBlock());  in startExplicitITBlock()
5785   if(inITBlock()) {  in cvtThumbBranches()
6788     if (inITBlock() &&  in shouldOmitCCOutOperand()
6820        !inITBlock() || (static_cast<ARMOperand &>(*Operands[3]).getReg() !=  in shouldOmitCCOutOperand()
6837        !inITBlock()))  in shouldOmitCCOutOperand()
6874       if ((Value < ((1 << 7) - 1) << 2) && inITBlock() && (!(Value & 3)) &&  in shouldOmitCCOutOperand()
7648   if (inITBlock() && !instIsBreakpoint(Inst)) {  in validateInstruction()
10011         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
10045         inITBlock() == (Inst.getOpcode() == ARM::t2MOVsr) &&  in processInstruction()
10080         inITBlock() == (Inst.getOpcode() == ARM::t2MOVsi) &&  in processInstruction()
10095       if (inITBlock()) {  in processInstruction()
10320         Inst.getOperand(5).getReg() != (inITBlock() ? 0 : ARM::CPSR) ||  in processInstruction()
10392     if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) {  in processInstruction()
10399     if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()){  in processInstruction()
10406     if (Inst.getOperand(1).getImm() == ARMCC::AL || inITBlock()) {  in processInstruction()
10488         Inst.getOperand(4).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
10614     assert(!inITBlock() && "nested IT blocks?!");  in processInstruction()
10629         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
10665         Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) &&  in processInstruction()
10747         !inITBlock())  in checkTargetMatchPredicate()
10750         inITBlock())  in checkTargetMatchPredicate()
10753     if (Opc == ARM::tLSLri && Inst.getOperand(3).getImm() == 0 && inITBlock())  in checkTargetMatchPredicate()