925     struct MemoryOp Memory;  member
1118       if(!Memory.OffsetImm || Memory.OffsetRegNum) return false;  in isThumbMemPC()
1119       if(Memory.BaseRegNum != ARM::PC) return false;  in isThumbMemPC()
1120       if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in isThumbMemPC()
1372     if (Memory.BaseRegNum &&  in isMVEMem()
1373         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) &&  in isMVEMem()
1374         !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum))  in isMVEMem()
1376     if (Memory.OffsetRegNum &&  in isMVEMem()
1378             Memory.OffsetRegNum))  in isMVEMem()
1385     if (Memory.BaseRegNum &&  in isGPRMem()
1386         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum))  in isGPRMem()
1388     if (Memory.OffsetRegNum &&  in isGPRMem()
1389         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.OffsetRegNum))  in isGPRMem()
1465     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffset()
1466      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffset()
1473             Memory.BaseRegNum))  in isMemNoOffsetT2()
1477     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2()
1478      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2()
1485             Memory.BaseRegNum))  in isMemNoOffsetT2NoSp()
1489     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2NoSp()
1490      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2NoSp()
1497             Memory.BaseRegNum))  in isMemNoOffsetT()
1501     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT()
1502      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT()
1505     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPCRelImm12()
1508     if (Memory.BaseRegNum != ARM::PC)  in isMemPCRelImm12()
1511     if (!Memory.OffsetImm) return true;  in isMemPCRelImm12()
1512     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPCRelImm12()
1595     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode2()
1597     if (Memory.OffsetRegNum) return true;  in isAddrMode2()
1599     if (!Memory.OffsetImm) return true;  in isAddrMode2()
1600     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode2()
1623     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode3()
1625     if (Memory.ShiftType != ARM_AM::no_shift) return false;  in isAddrMode3()
1627     if (Memory.OffsetRegNum) return true;  in isAddrMode3()
1629     if (!Memory.OffsetImm) return true;  in isAddrMode3()
1630     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode3()
1660     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5()
1662     if (Memory.OffsetRegNum) return false;  in isAddrMode5()
1664     if (!Memory.OffsetImm) return true;  in isAddrMode5()
1665     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5()
1679     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5FP16()
1681     if (Memory.OffsetRegNum) return false;  in isAddrMode5FP16()
1683     if (!Memory.OffsetImm) return true;  in isAddrMode5FP16()
1684     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5FP16()
1693     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBB()
1694         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemTBB()
1700     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBH()
1701         Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 ||  in isMemTBH()
1702         Memory.Alignment != 0 )  in isMemTBH()
1708     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.Alignment != 0)  in isMemRegOffset()
1714     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isT2MemRegOffset()
1715         Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC)  in isT2MemRegOffset()
1718     if (Memory.ShiftType == ARM_AM::no_shift)  in isT2MemRegOffset()
1720     if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3)  in isT2MemRegOffset()
1728     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemThumbRR()
1729         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemThumbRR()
1731     return isARMLowRegister(Memory.BaseRegNum) &&  in isMemThumbRR()
1732       (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum));  in isMemThumbRR()
1736     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs4()
1737         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs4()
1740     if (!Memory.OffsetImm) return true;  in isMemThumbRIs4()
1741     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs4()
1749     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs2()
1750         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs2()
1753     if (!Memory.OffsetImm) return true;  in isMemThumbRIs2()
1754     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs2()
1762     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs1()
1763         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs1()
1766     if (!Memory.OffsetImm) return true;  in isMemThumbRIs1()
1767     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs1()
1775     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbSPI()
1776         Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0)  in isMemThumbSPI()
1779     if (!Memory.OffsetImm) return true;  in isMemThumbSPI()
1780     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbSPI()
1793     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8s4Offset()
1796     if (!Memory.OffsetImm) return true;  in isMemImm8s4Offset()
1797     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8s4Offset()
1812     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7s4Offset()
1814             Memory.BaseRegNum))  in isMemImm7s4Offset()
1817     if (!Memory.OffsetImm) return true;  in isMemImm7s4Offset()
1818     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7s4Offset()
1827     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm0_1020s4Offset()
1830     if (!Memory.OffsetImm) return true;  in isMemImm0_1020s4Offset()
1831     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm0_1020s4Offset()
1839     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8Offset()
1842     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemImm8Offset()
1844     if (!Memory.OffsetImm) return true;  in isMemImm8Offset()
1845     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8Offset()
1855     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7ShiftedOffset()
1856         !ARMMCRegisterClasses[RegClassID].contains(Memory.BaseRegNum))  in isMemImm7ShiftedOffset()
1862     if (!Memory.OffsetImm) return true;  in isMemImm7ShiftedOffset()
1863     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7ShiftedOffset()
1885     if (!isMVEMem() || Memory.OffsetImm != nullptr || Memory.Alignment != 0)  in isMemRegRQOffset()
1889             Memory.BaseRegNum))  in isMemRegRQOffset()
1892             Memory.OffsetRegNum))  in isMemRegRQOffset()
1895     if (shift == 0 && Memory.ShiftType != ARM_AM::no_shift)  in isMemRegRQOffset()
1899         (Memory.ShiftType != ARM_AM::uxtw || Memory.ShiftImm != shift))  in isMemRegRQOffset()
1906     if (!isMVEMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemRegQOffset()
1910             Memory.BaseRegNum))  in isMemRegQOffset()
1913     if (!Memory.OffsetImm)  in isMemRegQOffset()
1917     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemRegQOffset()
1934     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPosImm8Offset()
1937     if (!Memory.OffsetImm) return true;  in isMemPosImm8Offset()
1938     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPosImm8Offset()
1946     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemNegImm8Offset()
1949     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemNegImm8Offset()
1951     if (!Memory.OffsetImm) return false;  in isMemNegImm8Offset()
1952     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemNegImm8Offset()
1961     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemUImm12Offset()
1964     if (!Memory.OffsetImm) return true;  in isMemUImm12Offset()
1965     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemUImm12Offset()
1980     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm12Offset()
1983     if (!Memory.OffsetImm) return true;  in isMemImm12Offset()
1984     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm12Offset()
2836     assert(isa<MCConstantExpr>(Memory.OffsetImm) && "Unknown value type!");  in addThumbMemPCOperands()
2837     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addThumbMemPCOperands()
2840       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addThumbMemPCOperands()
2860     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetOperands()
2865     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2Operands()
2870     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2NoSpOperands()
2875     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetTOperands()
2880     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemPCRelImm12Operands()
2883       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemPCRelImm12Operands()
2904     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAlignedMemoryOperands()
2905     Inst.addOperand(MCOperand::createImm(Memory.Alignment));  in addAlignedMemoryOperands()
2954     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode2Operands()
2955     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode2Operands()
2956     if (!Memory.OffsetRegNum) {  in addAddrMode2Operands()
2957       if (!Memory.OffsetImm)  in addAddrMode2Operands()
2959       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode2Operands()
2970         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode2Operands()
2975           ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addAddrMode2Operands()
2976                             Memory.ShiftImm, Memory.ShiftType);  in addAddrMode2Operands()
3007     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode3Operands()
3008     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode3Operands()
3009     if (!Memory.OffsetRegNum) {  in addAddrMode3Operands()
3010       if (!Memory.OffsetImm)  in addAddrMode3Operands()
3012       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode3Operands()
3023         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode3Operands()
3028           ARM_AM::getAM3Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 0);  in addAddrMode3Operands()
3066     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5Operands()
3067     if (!Memory.OffsetImm)  in addAddrMode5Operands()
3069     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5Operands()
3081       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5Operands()
3095     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5FP16Operands()
3097     if (!Memory.OffsetImm)  in addAddrMode5FP16Operands()
3099     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5FP16Operands()
3110       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5FP16Operands()
3124     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm8s4OffsetOperands()
3125     addExpr(Inst, Memory.OffsetImm);  in addMemImm8s4OffsetOperands()
3139     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm7s4OffsetOperands()
3140     addExpr(Inst, Memory.OffsetImm);  in addMemImm7s4OffsetOperands()
3145     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm0_1020s4OffsetOperands()
3146     if (!Memory.OffsetImm)  in addMemImm0_1020s4OffsetOperands()
3148     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemImm0_1020s4OffsetOperands()
3152       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemImm0_1020s4OffsetOperands()
3157     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImmOffsetOperands()
3158     addExpr(Inst, Memory.OffsetImm);  in addMemImmOffsetOperands()
3163     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegRQOffsetOperands()
3164     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegRQOffsetOperands()
3177     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemUImm12OffsetOperands()
3178     addExpr(Inst, Memory.OffsetImm);  in addMemUImm12OffsetOperands()
3191     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm12OffsetOperands()
3192     addExpr(Inst, Memory.OffsetImm);  in addMemImm12OffsetOperands()
3204     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBBOperands()
3205     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBBOperands()
3210     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBHOperands()
3211     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBHOperands()
3217       ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addMemRegOffsetOperands()
3218                         Memory.ShiftImm, Memory.ShiftType);  in addMemRegOffsetOperands()
3219     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegOffsetOperands()
3220     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegOffsetOperands()
3226     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addT2MemRegOffsetOperands()
3227     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addT2MemRegOffsetOperands()
3228     Inst.addOperand(MCOperand::createImm(Memory.ShiftImm));  in addT2MemRegOffsetOperands()
3233     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRROperands()
3234     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemThumbRROperands()
3239     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs4Operands()
3240     if (!Memory.OffsetImm)  in addMemThumbRIs4Operands()
3242     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs4Operands()
3246       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs4Operands()
3251     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs2Operands()
3252     if (!Memory.OffsetImm)  in addMemThumbRIs2Operands()
3254     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs2Operands()
3257       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs2Operands()
3262     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs1Operands()
3263     addExpr(Inst, Memory.OffsetImm);  in addMemThumbRIs1Operands()
3268     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbSPIOperands()
3269     if (!Memory.OffsetImm)  in addMemThumbSPIOperands()
3271     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbSPIOperands()
3275       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbSPIOperands()
3816     Op->Memory.BaseRegNum = BaseRegNum;  in CreateMem()
3817     Op->Memory.OffsetImm = OffsetImm;  in CreateMem()
3818     Op->Memory.OffsetRegNum = OffsetRegNum;  in CreateMem()
3819     Op->Memory.ShiftType = ShiftType;  in CreateMem()
3820     Op->Memory.ShiftImm = ShiftImm;  in CreateMem()
3821     Op->Memory.Alignment = Alignment;  in CreateMem()
3822     Op->Memory.isNegative = isNegative;  in CreateMem()
3955     if (Memory.BaseRegNum)  in print()
3956       OS << " base:" << RegName(Memory.BaseRegNum);  in print()
3957     if (Memory.OffsetImm)  in print()
3958       OS << " offset-imm:" << *Memory.OffsetImm;  in print()
3959     if (Memory.OffsetRegNum)  in print()
3960       OS << " offset-reg:" << (Memory.isNegative ? "-" : "")  in print()
3961          << RegName(Memory.OffsetRegNum);  in print()
3962     if (Memory.ShiftType != ARM_AM::no_shift) {  in print()
3963       OS << " shift-type:" << ARM_AM::getShiftOpcStr(Memory.ShiftType);  in print()
3964       OS << " shift-imm:" << Memory.ShiftImm;  in print()
3966     if (Memory.Alignment)  in print()
3967       OS << " alignment:" << Memory.Alignment;  in print()