288   } ITState;  member in __anon2aa686d00111::ARMAsmParser
301     ITInst.addOperand(MCOperand::createImm(ITState.Cond));  in flushPendingInstructions()
302     ITInst.addOperand(MCOperand::createImm(ITState.Mask));  in flushPendingInstructions()
313     ITState.Mask = 0;  in flushPendingInstructions()
314     ITState.CurPosition = ~0U;  in flushPendingInstructions()
317   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()
318   bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; }  in inExplicitITBlock()
319   bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; }  in inImplicitITBlock()
322     return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask);  in lastInITBlock()
330     unsigned TZ = countTrailingZeros(ITState.Mask);  in forwardITPosition()
331     if (++ITState.CurPosition == 5 - TZ && ITState.IsExplicit)  in forwardITPosition()
332       ITState.CurPosition = ~0U; // Done with the IT block after this.  in forwardITPosition()
338     assert(ITState.CurPosition > 1);  in rewindImplicitITPosition()
339     ITState.CurPosition--;  in rewindImplicitITPosition()
340     unsigned TZ = countTrailingZeros(ITState.Mask);  in rewindImplicitITPosition()
342     NewMask |= ITState.Mask & (0xC << TZ);  in rewindImplicitITPosition()
344     ITState.Mask = NewMask;  in rewindImplicitITPosition()
351     assert(ITState.CurPosition == 1);  in discardImplicitITBlock()
352     ITState.CurPosition = ~0U;  in discardImplicitITBlock()
362     unsigned MaskBit = extractITMaskBit(ITState.Mask, ITState.CurPosition);  in currentITCond()
363     return MaskBit ? ARMCC::getOppositeCondition(ITState.Cond) : ITState.Cond;  in currentITCond()
369     if (ITState.CurPosition == 1) {  in invertCurrentITCondition()
370       ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond);  in invertCurrentITCondition()
372       ITState.Mask ^= 1 << (5 - ITState.CurPosition);  in invertCurrentITCondition()
378     return inITBlock() && (ITState.Mask & 1);  in isITBlockFull()
386     assert(Cond == ITState.Cond ||  in extendImplicitITBlock()
387            Cond == ARMCC::getOppositeCondition(ITState.Cond));  in extendImplicitITBlock()
388     unsigned TZ = countTrailingZeros(ITState.Mask);  in extendImplicitITBlock()
391     NewMask |= ITState.Mask & (0xE << TZ);  in extendImplicitITBlock()
393     NewMask |= (Cond != ITState.Cond) << TZ;  in extendImplicitITBlock()
396     ITState.Mask = NewMask;  in extendImplicitITBlock()
402     ITState.Cond = ARMCC::AL;  in startImplicitITBlock()
403     ITState.Mask = 8;  in startImplicitITBlock()
404     ITState.CurPosition = 1;  in startImplicitITBlock()
405     ITState.IsExplicit = false;  in startImplicitITBlock()
414     ITState.Cond = Cond;  in startExplicitITBlock()
415     ITState.Mask = Mask;  in startExplicitITBlock()
416     ITState.CurPosition = 0;  in startExplicitITBlock()
417     ITState.IsExplicit = true;  in startExplicitITBlock()
696     ITState.CurPosition = ~0U;  in ARMAsmParser()
10880     extendImplicitITBlock(ITState.Cond);  in MatchInstruction()
10938       ITState.Cond =  in MatchInstruction()