Lines Matching refs:Registry
92 PassRegistry &Registry = *PassRegistry::getPassRegistry(); in LLVMInitializeARMTarget() local
93 initializeGlobalISel(Registry); in LLVMInitializeARMTarget()
94 initializeARMLoadStoreOptPass(Registry); in LLVMInitializeARMTarget()
95 initializeARMPreAllocLoadStoreOptPass(Registry); in LLVMInitializeARMTarget()
96 initializeARMParallelDSPPass(Registry); in LLVMInitializeARMTarget()
97 initializeARMBranchTargetsPass(Registry); in LLVMInitializeARMTarget()
98 initializeARMConstantIslandsPass(Registry); in LLVMInitializeARMTarget()
99 initializeARMExecutionDomainFixPass(Registry); in LLVMInitializeARMTarget()
100 initializeARMExpandPseudoPass(Registry); in LLVMInitializeARMTarget()
101 initializeThumb2SizeReducePass(Registry); in LLVMInitializeARMTarget()
102 initializeMVEVPTBlockPass(Registry); in LLVMInitializeARMTarget()
103 initializeMVETPAndVPTOptimisationsPass(Registry); in LLVMInitializeARMTarget()
104 initializeMVETailPredicationPass(Registry); in LLVMInitializeARMTarget()
105 initializeARMLowOverheadLoopsPass(Registry); in LLVMInitializeARMTarget()
106 initializeARMBlockPlacementPass(Registry); in LLVMInitializeARMTarget()
107 initializeMVEGatherScatterLoweringPass(Registry); in LLVMInitializeARMTarget()
108 initializeARMSLSHardeningPass(Registry); in LLVMInitializeARMTarget()
109 initializeMVELaneInterleavingPass(Registry); in LLVMInitializeARMTarget()
110 initializeARMFixCortexA57AES1742098Pass(Registry); in LLVMInitializeARMTarget()