Lines Matching refs:SPR
412 def SPR : RegisterClass<"ARM", [f32], 32, (sequence "S%u", 0, 31)> {
413 let AltOrders = [(add (decimate SPR, 2), SPR),
414 (add (decimate SPR, 4),
415 (decimate SPR, 2),
416 (decimate (rotl SPR, 1), 4),
417 (decimate (rotl SPR, 1), 2))];
425 let AltOrders = [(add (decimate HPR, 2), SPR),
436 // Subset of SPR which can be used as a source of NEON scalars for 16-bit
461 def FPWithVPR : RegisterClass<"ARM", [f32], 32, (add SPR, DPR, VPR)> {
466 // 32-bit SPR subregs).
490 // Subset of QPR that have 32-bit SPR subregs.