Lines Matching refs:getKillRegState

746             .addReg(Base, getKillRegState(KillOldBase));  in CreateLoadStoreMulti()
749 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
759 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
765 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
770 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
812 .addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
821 MIB.addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
827 MIB.addReg(R.first, getDefRegState(isDef) | getKillRegState(R.second)); in CreateLoadStoreMulti()
851 MIB.addReg(Regs[0].first, getKillRegState(Regs[0].second)) in CreateLoadStoreDouble()
852 .addReg(Regs[1].first, getKillRegState(Regs[1].second)); in CreateLoadStoreDouble()
1351 .addReg(Base, getKillRegState(BaseKill)) in MergeBaseUpdateLSMultiple()
1532 .addReg(Base, getKillRegState(isLd ? BaseKill : false)) in MergeBaseUpdateLoadStore()
1536 : getKillRegState(MO.isKill()))) in MergeBaseUpdateLoadStore()
1588 .addReg(MO.getReg(), getKillRegState(MO.isKill())) in MergeBaseUpdateLoadStore()
1599 .addReg(MO.getReg(), getKillRegState(MO.isKill())) in MergeBaseUpdateLoadStore()
1743 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1751 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1752 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1811 .addReg(BaseReg, getKillRegState(BaseKill)) in FixInvalidRegPairOp()
1819 .addReg(BaseReg, getKillRegState(BaseKill)) in FixInvalidRegPairOp()
1822 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1824 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)) in FixInvalidRegPairOp()