Lines Matching refs:RegBank
138 unsigned selectLoadStoreOpCode(unsigned Opc, unsigned RegBank,
189 const RegisterBank *RegBank = RBI.getRegBank(Reg, MRI, TRI); in guessRegClass() local
190 assert(RegBank && "Can't get reg bank for virtual register"); in guessRegClass()
193 assert((RegBank->getID() == ARM::GPRRegBankID || in guessRegClass()
194 RegBank->getID() == ARM::FPRRegBankID) && in guessRegClass()
197 if (RegBank->getID() == ARM::FPRRegBankID) { in guessRegClass()
356 unsigned RegBank, in selectLoadStoreOpCode() argument
360 if (RegBank == ARM::GPRRegBankID) { in selectLoadStoreOpCode()
374 if (RegBank == ARM::FPRRegBankID) { in selectLoadStoreOpCode()
1087 unsigned RegBank = RBI.getRegBank(Reg, MRI, TRI)->getID(); in select() local
1095 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select()