Lines Matching refs:opc
521 multiclass vsel_inst<string op, bits<2> opc, int CC> {
524 def H : AHbInp<0b11100, opc, 0,
530 def S : ASbInp<0b11100, opc, 0,
536 def D : ADbInp<0b11100, opc, 0,
550 multiclass vmaxmin_inst<string op, bit opc, SDNode SD> {
553 def H : AHbInp<0b11101, 0b00, opc,
559 def S : ASbInp<0b11101, 0b00, opc,
565 def D : ADbInp<0b11101, 0b00, opc,
895 multiclass vcvt_inst<string opc, bits<2> rm,
900 NoItinerary, !strconcat("vcvt", opc, ".s32.f16\t$Sd, $Sm"),
908 NoItinerary, !strconcat("vcvt", opc, ".u32.f16\t$Sd, $Sm"),
916 NoItinerary, !strconcat("vcvt", opc, ".s32.f32\t$Sd, $Sm"),
924 NoItinerary, !strconcat("vcvt", opc, ".u32.f32\t$Sd, $Sm"),
932 NoItinerary, !strconcat("vcvt", opc, ".s32.f64\t$Sd, $Dm"),
947 NoItinerary, !strconcat("vcvt", opc, ".u32.f64\t$Sd, $Dm"),
1018 multiclass vrint_inst_zrx<string opc, bit op, bit op2, SDPatternOperator node> {
1021 NoItinerary, !strconcat("vrint", opc), ".f16\t$Sd, $Sm",
1030 NoItinerary, !strconcat("vrint", opc), ".f32\t$Sd, $Sm", "",
1038 NoItinerary, !strconcat("vrint", opc), ".f64\t$Dd, $Dm", "",
1045 def : InstAlias<!strconcat("vrint", opc, "$p.f16.f16\t$Sd, $Sm"),
1048 def : InstAlias<!strconcat("vrint", opc, "$p.f32.f32\t$Sd, $Sm"),
1051 def : InstAlias<!strconcat("vrint", opc, "$p.f64.f64\t$Dd, $Dm"),
1060 multiclass vrint_inst_anpm<string opc, bits<2> rm,
1066 NoItinerary, !strconcat("vrint", opc, ".f16\t$Sd, $Sm"),
1073 NoItinerary, !strconcat("vrint", opc, ".f32\t$Sd, $Sm"),
1080 NoItinerary, !strconcat("vrint", opc, ".f64\t$Dd, $Dm"),
1087 def : InstAlias<!strconcat("vrint", opc, ".f16.f16\t$Sd, $Sm"),
1090 def : InstAlias<!strconcat("vrint", opc, ".f32.f32\t$Sd, $Sm"),
1093 def : InstAlias<!strconcat("vrint", opc, ".f64.f64\t$Dd, $Dm"),
1393 InstrItinClass itin, string opc, string asm,
1395 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1413 string opc, string asm, list<dag> pattern>
1414 : AVConv1In<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1431 InstrItinClass itin, string opc, string asm,
1433 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1545 InstrItinClass itin, string opc, string asm,
1547 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1565 InstrItinClass itin, string opc, string asm,
1567 : AVConv1In<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1584 InstrItinClass itin, string opc, string asm,
1586 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1795 string opc, string asm, list<dag> pattern>
1796 : AVConv1XI<op1, op2, op3, op4, op5, oops, iops, itin, opc, asm, pattern> {
1808 string opc, string asm, list<dag> pattern>
1809 : AVConv1XI<op1, op2, op3, op4, op5, oops, iops, itin, opc, asm, pattern> {
1992 class BF16_VCVT<string opc, bits<2> op7_6>
1995 opc, ".bf16.f32\t$Sd, $Sm", "", []>,
2449 class MovFromVFP<bits<4> opc19_16, dag oops, dag iops, string opc, string asm,
2451 VFPAI<oops, iops, VFPMiscFrm, IIC_fpSTAT, opc, asm, "", pattern> {
2534 class MovToVFP<bits<4> opc19_16, dag oops, dag iops, string opc, string asm,
2536 VFPAI<oops, iops, VFPMiscFrm, IIC_fpSTAT, opc, asm, "", pattern> {
2818 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2821 !if(opc,"vldr","vstr"), !strconcat("\t", sysreg, ", ", Dest), cstr, []>,
2829 let Inst{20} = opc;
2835 let mayLoad = opc;
2836 let mayStore = !if(opc, 0b0, 0b1);
2840 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2843 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2850 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2858 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,