Lines Matching refs:Sn
410 let TwoOperandAliasConstraint = "$Sn = $Sd" in
412 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
413 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm",
414 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>,
421 let TwoOperandAliasConstraint = "$Sn = $Sd" in
423 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
424 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm",
425 [(set (f16 HPR:$Sd), (fadd (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
435 let TwoOperandAliasConstraint = "$Sn = $Sd" in
437 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
438 IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm",
439 [(set SPR:$Sd, (fsub SPR:$Sn, SPR:$Sm))]>,
446 let TwoOperandAliasConstraint = "$Sn = $Sd" in
448 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
449 IIC_fpALU16, "vsub", ".f16\t$Sd, $Sn, $Sm",
450 [(set (f16 HPR:$Sd), (fsub (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
460 let TwoOperandAliasConstraint = "$Sn = $Sd" in
462 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
463 IIC_fpDIV32, "vdiv", ".f32\t$Sd, $Sn, $Sm",
464 [(set SPR:$Sd, (fdiv SPR:$Sn, SPR:$Sm))]>,
467 let TwoOperandAliasConstraint = "$Sn = $Sd" in
469 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
470 IIC_fpDIV16, "vdiv", ".f16\t$Sd, $Sn, $Sm",
471 [(set (f16 HPR:$Sd), (fdiv (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
481 let TwoOperandAliasConstraint = "$Sn = $Sd" in
483 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
484 IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm",
485 [(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]>,
492 let TwoOperandAliasConstraint = "$Sn = $Sd" in
494 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
495 IIC_fpMUL16, "vmul", ".f16\t$Sd, $Sn, $Sm",
496 [(set (f16 HPR:$Sd), (fmul (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
506 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
507 IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
508 [(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]>,
516 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
517 IIC_fpMUL16, "vnmul", ".f16\t$Sd, $Sn, $Sm",
518 [(set (f16 HPR:$Sd), (fneg (fmul (f16 HPR:$Sn), (f16 HPR:$Sm))))]>,
525 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
526 NoItinerary, !strconcat("vsel", op, ".f16\t$Sd, $Sn, $Sm"),
527 [(set (f16 HPR:$Sd), (ARMcmov (f16 HPR:$Sm), (f16 HPR:$Sn), CC))]>,
531 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
532 NoItinerary, !strconcat("vsel", op, ".f32\t$Sd, $Sn, $Sm"),
533 [(set SPR:$Sd, (ARMcmov SPR:$Sm, SPR:$Sn, CC))]>,
554 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
555 NoItinerary, !strconcat(op, ".f16\t$Sd, $Sn, $Sm"),
556 [(set (f16 HPR:$Sd), (SD (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
560 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
561 NoItinerary, !strconcat(op, ".f32\t$Sd, $Sn, $Sm"),
562 [(set SPR:$Sd, (SD SPR:$Sn, SPR:$Sm))]>,
1155 (outs GPR:$Rt), (ins SPR:$Sn),
1156 IIC_fpMOVSI, "vmov", "\t$Rt, $Sn",
1157 [(set GPR:$Rt, (bitconvert SPR:$Sn))]>,
1162 bits<5> Sn;
1165 let Inst{19-16} = Sn{4-1};
1166 let Inst{7} = Sn{0};
1179 (outs SPR:$Sn), (ins GPR:$Rt),
1180 IIC_fpMOVIS, "vmov", "\t$Sn, $Rt",
1181 [(set SPR:$Sn, (bitconvert GPR:$Rt))]>,
1185 bits<5> Sn;
1189 let Inst{19-16} = Sn{4-1};
1190 let Inst{7} = Sn{0};
1334 (outs rGPR:$Rt), (ins HPR:$Sn),
1335 IIC_fpMOVSI, "vmov", ".f16\t$Rt, $Sn",
1341 bits<5> Sn;
1344 let Inst{19-16} = Sn{4-1};
1345 let Inst{7} = Sn{0};
1356 (outs HPR:$Sn), (ins rGPR:$Rt),
1357 IIC_fpMOVIS, "vmov", ".f16\t$Sn, $Rt",
1362 bits<5> Sn;
1366 let Inst{19-16} = Sn{4-1};
1367 let Inst{7} = Sn{0};
1376 def : FPRegs16Pat<(arm_vmovrh (f16 HPR:$Sn)), (VMOVRH (f16 HPR:$Sn))>;
1377 def : FPRegs16Pat<(arm_vmovrh (bf16 HPR:$Sn)), (VMOVRH (bf16 HPR:$Sn))>;
2036 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2037 IIC_fpMAC32, "vmla", ".f32\t$Sd, $Sn, $Sm",
2038 [(set SPR:$Sd, (fadd_mlx (fmul_su SPR:$Sn, SPR:$Sm),
2049 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2050 IIC_fpMAC16, "vmla", ".f16\t$Sd, $Sn, $Sm",
2051 [(set (f16 HPR:$Sd), (fadd_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)),
2077 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2078 IIC_fpMAC32, "vmls", ".f32\t$Sd, $Sn, $Sm",
2079 [(set SPR:$Sd, (fadd_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2090 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2091 IIC_fpMAC16, "vmls", ".f16\t$Sd, $Sn, $Sm",
2092 [(set (f16 HPR:$Sd), (fadd_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2117 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2118 IIC_fpMAC32, "vnmla", ".f32\t$Sd, $Sn, $Sm",
2119 [(set SPR:$Sd, (fsub_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2130 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2131 IIC_fpMAC16, "vnmla", ".f16\t$Sd, $Sn, $Sm",
2132 [(set (f16 HPR:$Sd), (fsub_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2169 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2170 IIC_fpMAC32, "vnmls", ".f32\t$Sd, $Sn, $Sm",
2171 [(set SPR:$Sd, (fsub_mlx (fmul_su SPR:$Sn, SPR:$Sm), SPR:$Sdin))]>,
2181 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2182 IIC_fpMAC16, "vnmls", ".f16\t$Sd, $Sn, $Sm",
2183 … [(set (f16 HPR:$Sd), (fsub_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)), (f16 HPR:$Sdin)))]>,
2210 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2211 IIC_fpFMAC32, "vfma", ".f32\t$Sd, $Sn, $Sm",
2212 [(set SPR:$Sd, (fadd_mlx (fmul_su SPR:$Sn, SPR:$Sm),
2222 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2223 IIC_fpFMAC16, "vfma", ".f16\t$Sd, $Sn, $Sm",
2224 [(set (f16 HPR:$Sd), (fadd_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)),
2245 def : Pat<(f32 (fma SPR:$Sn, SPR:$Sm, SPR:$Sdin)),
2246 (VFMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2248 def : Pat<(f16 (fma HPR:$Sn, HPR:$Sm, (f16 HPR:$Sdin))),
2249 (VFMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2262 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2263 IIC_fpFMAC32, "vfms", ".f32\t$Sd, $Sn, $Sm",
2264 [(set SPR:$Sd, (fadd_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2274 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2275 IIC_fpFMAC16, "vfms", ".f16\t$Sd, $Sn, $Sm",
2276 [(set (f16 HPR:$Sd), (fadd_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2297 def : Pat<(f32 (fma (fneg SPR:$Sn), SPR:$Sm, SPR:$Sdin)),
2298 (VFMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2300 def : Pat<(f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (f16 HPR:$Sdin))),
2301 (VFMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2314 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2315 IIC_fpFMAC32, "vfnma", ".f32\t$Sd, $Sn, $Sm",
2316 [(set SPR:$Sd, (fsub_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2326 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2327 IIC_fpFMAC16, "vfnma", ".f16\t$Sd, $Sn, $Sm",
2328 [(set (f16 HPR:$Sd), (fsub_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2346 def : Pat<(fneg (fma (f32 SPR:$Sn), (f32 SPR:$Sm), (f32 SPR:$Sdin))),
2347 (VFNMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2349 def : Pat<(fneg (fma (f16 HPR:$Sn), (f16 HPR:$Sm), (f16 (f16 HPR:$Sdin)))),
2350 (VFNMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2356 def : Pat<(f32 (fma (fneg SPR:$Sn), SPR:$Sm, (fneg SPR:$Sdin))),
2357 (VFNMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2359 def : Pat<(f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (fneg (f16 HPR:$Sdin)))),
2360 (VFNMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2373 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2374 IIC_fpFMAC32, "vfnms", ".f32\t$Sd, $Sn, $Sm",
2375 [(set SPR:$Sd, (fsub_mlx (fmul_su SPR:$Sn, SPR:$Sm), SPR:$Sdin))]>,
2384 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2385 IIC_fpFMAC16, "vfnms", ".f16\t$Sd, $Sn, $Sm",
2386 … [(set (f16 HPR:$Sd), (fsub_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)), (f16 HPR:$Sdin)))]>,
2404 def : Pat<(f32 (fma SPR:$Sn, SPR:$Sm, (fneg SPR:$Sdin))),
2405 (VFNMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2407 def : Pat<(f16 (fma (f16 HPR:$Sn), (f16 HPR:$Sm), (fneg (f16 HPR:$Sdin)))),
2408 (VFNMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2414 def : Pat<(fneg (f32 (fma (fneg SPR:$Sn), SPR:$Sm, SPR:$Sdin))),
2415 (VFNMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2417 def : Pat<(fneg (f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (f16 HPR:$Sdin)))),
2418 (VFNMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2432 def VMOVScc : PseudoInst<(outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm, cmovpred:$p),
2435 (ARMcmov SPR:$Sn, SPR:$Sm, cmovpred:$p))]>,
2436 RegConstraint<"$Sn = $Sd">, Requires<[HasFPRegs]>;
2438 def VMOVHcc : PseudoInst<(outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm, cmovpred:$p),
2441 (ARMcmov (f16 HPR:$Sn), (f16 HPR:$Sm), cmovpred:$p))]>,
2442 RegConstraint<"$Sd = $Sn">, Requires<[HasFPRegs]>;
2723 def : VFP2InstAlias<"fadds${p} $Sd, $Sn, $Sm",
2724 (VADDS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p)>;
2727 def : VFP2InstAlias<"fsubs${p} $Sd, $Sn, $Sm",
2728 (VSUBS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p)>;
2747 def : VFP2InstAlias<"vmov${p}.8 $Rt, $Sn",
2748 (VMOVRS GPR:$Rt, SPR:$Sn, pred:$p)>;
2749 def : VFP2InstAlias<"vmov${p}.16 $Rt, $Sn",
2750 (VMOVRS GPR:$Rt, SPR:$Sn, pred:$p)>;
2751 def : VFP2InstAlias<"vmov${p}.32 $Rt, $Sn",
2752 (VMOVRS GPR:$Rt, SPR:$Sn, pred:$p)>;
2753 def : VFP2InstAlias<"vmov${p}.8 $Sn, $Rt",
2754 (VMOVSR SPR:$Sn, GPR:$Rt, pred:$p)>;
2755 def : VFP2InstAlias<"vmov${p}.16 $Sn, $Rt",
2756 (VMOVSR SPR:$Sn, GPR:$Rt, pred:$p)>;
2757 def : VFP2InstAlias<"vmov${p}.32 $Sn, $Rt",
2758 (VMOVSR SPR:$Sn, GPR:$Rt, pred:$p)>;