Lines Matching refs:Sm
412 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
413 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm",
414 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>,
423 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
424 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm",
425 [(set (f16 HPR:$Sd), (fadd (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
437 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
438 IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm",
439 [(set SPR:$Sd, (fsub SPR:$Sn, SPR:$Sm))]>,
448 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
449 IIC_fpALU16, "vsub", ".f16\t$Sd, $Sn, $Sm",
450 [(set (f16 HPR:$Sd), (fsub (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
462 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
463 IIC_fpDIV32, "vdiv", ".f32\t$Sd, $Sn, $Sm",
464 [(set SPR:$Sd, (fdiv SPR:$Sn, SPR:$Sm))]>,
469 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
470 IIC_fpDIV16, "vdiv", ".f16\t$Sd, $Sn, $Sm",
471 [(set (f16 HPR:$Sd), (fdiv (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
483 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
484 IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm",
485 [(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]>,
494 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
495 IIC_fpMUL16, "vmul", ".f16\t$Sd, $Sn, $Sm",
496 [(set (f16 HPR:$Sd), (fmul (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
506 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
507 IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
508 [(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]>,
516 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
517 IIC_fpMUL16, "vnmul", ".f16\t$Sd, $Sn, $Sm",
518 [(set (f16 HPR:$Sd), (fneg (fmul (f16 HPR:$Sn), (f16 HPR:$Sm))))]>,
525 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
526 NoItinerary, !strconcat("vsel", op, ".f16\t$Sd, $Sn, $Sm"),
527 [(set (f16 HPR:$Sd), (ARMcmov (f16 HPR:$Sm), (f16 HPR:$Sn), CC))]>,
531 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
532 NoItinerary, !strconcat("vsel", op, ".f32\t$Sd, $Sn, $Sm"),
533 [(set SPR:$Sd, (ARMcmov SPR:$Sm, SPR:$Sn, CC))]>,
554 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm),
555 NoItinerary, !strconcat(op, ".f16\t$Sd, $Sn, $Sm"),
556 [(set (f16 HPR:$Sd), (SD (f16 HPR:$Sn), (f16 HPR:$Sm)))]>,
560 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
561 NoItinerary, !strconcat(op, ".f32\t$Sd, $Sn, $Sm"),
562 [(set SPR:$Sd, (SD SPR:$Sn, SPR:$Sm))]>,
591 (outs), (ins SPR:$Sd, SPR:$Sm),
592 IIC_fpCMP32, "vcmpe", ".f32\t$Sd, $Sm", "",
593 [(arm_cmpfpe SPR:$Sd, SPR:$Sm)]> {
600 (outs), (ins HPR:$Sd, HPR:$Sm),
601 IIC_fpCMP16, "vcmpe", ".f16\t$Sd, $Sm",
602 [(arm_cmpfpe (f16 HPR:$Sd), (f16 HPR:$Sm))]>;
610 (outs), (ins SPR:$Sd, SPR:$Sm),
611 IIC_fpCMP32, "vcmp", ".f32\t$Sd, $Sm", "",
612 [(arm_cmpfp SPR:$Sd, SPR:$Sm)]> {
619 (outs), (ins HPR:$Sd, HPR:$Sm),
620 IIC_fpCMP16, "vcmp", ".f16\t$Sd, $Sm",
621 [(arm_cmpfp (f16 HPR:$Sd), (f16 HPR:$Sm))]>;
634 (outs SPR:$Sd), (ins SPR:$Sm),
635 IIC_fpUNA32, "vabs", ".f32\t$Sd, $Sm",
636 [(set SPR:$Sd, (fabs SPR:$Sm))]> {
643 (outs HPR:$Sd), (ins HPR:$Sm),
644 IIC_fpUNA16, "vabs", ".f16\t$Sd, $Sm",
645 [(set (f16 HPR:$Sd), (fabs (f16 HPR:$Sm)))]>;
706 (outs DPR:$Dd), (ins SPR:$Sm),
707 IIC_fpCVTDS, "vcvt", ".f64.f32\t$Dd, $Sm", "",
708 [(set DPR:$Dd, (fpextend SPR:$Sm))]>,
712 bits<5> Sm;
715 let Inst{3-0} = Sm{4-1};
716 let Inst{5} = Sm{0};
751 def VCVTBHS: ASuI<0b11101, 0b11, 0b0010, 0b01, 0, (outs SPR:$Sd), (ins SPR:$Sm),
752 /* FIXME */ IIC_fpCVTSH, "vcvtb", ".f32.f16\t$Sd, $Sm", "",
757 def : FP16Pat<(f32 (fpextend (f16 HPR:$Sm))),
758 (VCVTBHS (COPY_TO_REGCLASS (f16 HPR:$Sm), SPR))>;
763 def VCVTBSH: ASuI<0b11101, 0b11, 0b0011, 0b01, 0, (outs SPR:$Sd), (ins SPR:$Sda, SPR:$Sm),
764 /* FIXME */ IIC_fpCVTHS, "vcvtb", ".f16.f32\t$Sd, $Sm", "$Sd = $Sda",
769 def : FP16Pat<(f16 (fpround SPR:$Sm)),
770 (COPY_TO_REGCLASS (VCVTBSH (IMPLICIT_DEF), SPR:$Sm), HPR)>;
785 def VCVTTHS: ASuI<0b11101, 0b11, 0b0010, 0b11, 0, (outs SPR:$Sd), (ins SPR:$Sm),
786 /* FIXME */ IIC_fpCVTSH, "vcvtt", ".f32.f16\t$Sd, $Sm", "",
799 def VCVTTSH: ASuI<0b11101, 0b11, 0b0011, 0b11, 0, (outs SPR:$Sd), (ins SPR:$Sda, SPR:$Sm),
800 /* FIXME */ IIC_fpCVTHS, "vcvtt", ".f16.f32\t$Sd, $Sm", "$Sd = $Sda",
817 (outs DPR:$Dd), (ins SPR:$Sm),
818 NoItinerary, "vcvtb", ".f64.f16\t$Dd, $Sm", "",
823 bits<5> Sm;
826 let Inst{3-0} = Sm{4-1};
827 let Inst{5} = Sm{0};
832 def : FullFP16Pat<(f64 (fpextend (f16 HPR:$Sm))),
833 (VCVTBHD (COPY_TO_REGCLASS (f16 HPR:$Sm), SPR))>,
865 (outs DPR:$Dd), (ins SPR:$Sm),
866 NoItinerary, "vcvtt", ".f64.f16\t$Dd, $Sm", "",
869 bits<5> Sm;
872 let Inst{3-0} = Sm{4-1};
873 let Inst{5} = Sm{0};
899 (outs SPR:$Sd), (ins HPR:$Sm),
900 NoItinerary, !strconcat("vcvt", opc, ".s32.f16\t$Sd, $Sm"),
907 (outs SPR:$Sd), (ins HPR:$Sm),
908 NoItinerary, !strconcat("vcvt", opc, ".u32.f16\t$Sd, $Sm"),
915 (outs SPR:$Sd), (ins SPR:$Sm),
916 NoItinerary, !strconcat("vcvt", opc, ".s32.f32\t$Sd, $Sm"),
923 (outs SPR:$Sd), (ins SPR:$Sm),
924 NoItinerary, !strconcat("vcvt", opc, ".u32.f32\t$Sd, $Sm"),
1005 (outs SPR:$Sd), (ins SPR:$Sm),
1006 IIC_fpUNA32, "vneg", ".f32\t$Sd, $Sm",
1007 [(set SPR:$Sd, (fneg SPR:$Sm))]> {
1014 (outs HPR:$Sd), (ins HPR:$Sm),
1015 IIC_fpUNA16, "vneg", ".f16\t$Sd, $Sm",
1016 [(set (f16 HPR:$Sd), (fneg (f16 HPR:$Sm)))]>;
1020 (outs HPR:$Sd), (ins HPR:$Sm),
1021 NoItinerary, !strconcat("vrint", opc), ".f16\t$Sd, $Sm",
1022 [(set (f16 HPR:$Sd), (node (f16 HPR:$Sm)))]>,
1029 (outs SPR:$Sd), (ins SPR:$Sm),
1030 NoItinerary, !strconcat("vrint", opc), ".f32\t$Sd, $Sm", "",
1031 [(set (f32 SPR:$Sd), (node (f32 SPR:$Sm)))]>,
1045 def : InstAlias<!strconcat("vrint", opc, "$p.f16.f16\t$Sd, $Sm"),
1046 (!cast<Instruction>(NAME#"H") SPR:$Sd, SPR:$Sm, pred:$p), 0>,
1048 def : InstAlias<!strconcat("vrint", opc, "$p.f32.f32\t$Sd, $Sm"),
1049 (!cast<Instruction>(NAME#"S") SPR:$Sd, SPR:$Sm, pred:$p), 0>,
1065 (outs HPR:$Sd), (ins HPR:$Sm),
1066 NoItinerary, !strconcat("vrint", opc, ".f16\t$Sd, $Sm"),
1067 [(set (f16 HPR:$Sd), (node (f16 HPR:$Sm)))]>,
1072 (outs SPR:$Sd), (ins SPR:$Sm),
1073 NoItinerary, !strconcat("vrint", opc, ".f32\t$Sd, $Sm"),
1074 [(set (f32 SPR:$Sd), (node (f32 SPR:$Sm)))]>,
1087 def : InstAlias<!strconcat("vrint", opc, ".f16.f16\t$Sd, $Sm"),
1088 (!cast<Instruction>(NAME#"H") HPR:$Sd, HPR:$Sm), 0>,
1090 def : InstAlias<!strconcat("vrint", opc, ".f32.f32\t$Sd, $Sm"),
1091 (!cast<Instruction>(NAME#"S") SPR:$Sd, SPR:$Sm), 0>,
1110 (outs SPR:$Sd), (ins SPR:$Sm),
1111 IIC_fpSQRT32, "vsqrt", ".f32\t$Sd, $Sm", "",
1112 [(set SPR:$Sd, (fsqrt SPR:$Sm))]>,
1116 (outs HPR:$Sd), (ins HPR:$Sm),
1117 IIC_fpSQRT16, "vsqrt", ".f16\t$Sd, $Sm",
1118 [(set (f16 HPR:$Sd), (fsqrt (f16 HPR:$Sm)))]>;
1128 (outs SPR:$Sd), (ins SPR:$Sm),
1129 IIC_fpUNA32, "vmov", ".f32\t$Sd, $Sm", "", []>,
1135 (outs SPR:$Sd), (ins SPR:$Sm),
1136 IIC_fpUNA16, "vmovx.f16\t$Sd, $Sm", []>,
1140 (outs SPR:$Sd), (ins SPR:$Sda, SPR:$Sm),
1141 IIC_fpUNA16, "vins.f16\t$Sd, $Sm", []>,
1399 bits<5> Sm;
1402 let Inst{3-0} = Sm{4-1};
1403 let Inst{5} = Sm{0};
1418 bits<5> Sm;
1421 let Inst{3-0} = Sm{4-1};
1422 let Inst{5} = Sm{0};
1437 bits<5> Sm;
1440 let Inst{3-0} = Sm{4-1};
1441 let Inst{5} = Sm{0};
1450 (outs DPR:$Dd), (ins SPR:$Sm),
1451 IIC_fpCVTID, "vcvt", ".f64.s32\t$Dd, $Sm",
1466 (outs SPR:$Sd),(ins SPR:$Sm),
1467 IIC_fpCVTIS, "vcvt", ".f32.s32\t$Sd, $Sm",
1484 (outs HPR:$Sd), (ins SPR:$Sm),
1485 IIC_fpCVTIH, "vcvt", ".f16.s32\t$Sd, $Sm",
1496 (outs DPR:$Dd), (ins SPR:$Sm),
1497 IIC_fpCVTID, "vcvt", ".f64.u32\t$Dd, $Sm",
1512 (outs SPR:$Sd), (ins SPR:$Sm),
1513 IIC_fpCVTIS, "vcvt", ".f32.u32\t$Sd, $Sm",
1530 (outs HPR:$Sd), (ins SPR:$Sm),
1531 IIC_fpCVTIH, "vcvt", ".f16.u32\t$Sd, $Sm",
1571 bits<5> Sm;
1574 let Inst{3-0} = Sm{4-1};
1575 let Inst{5} = Sm{0};
1590 bits<5> Sm;
1593 let Inst{3-0} = Sm{4-1};
1594 let Inst{5} = Sm{0};
1624 (outs SPR:$Sd), (ins SPR:$Sm),
1625 IIC_fpCVTSI, "vcvt", ".s32.f32\t$Sd, $Sm",
1648 (outs SPR:$Sd), (ins HPR:$Sm),
1649 IIC_fpCVTHI, "vcvt", ".s32.f16\t$Sd, $Sm",
1682 (outs SPR:$Sd), (ins SPR:$Sm),
1683 IIC_fpCVTSI, "vcvt", ".u32.f32\t$Sd, $Sm",
1706 (outs SPR:$Sd), (ins HPR:$Sm),
1707 IIC_fpCVTHI, "vcvt", ".u32.f16\t$Sd, $Sm",
1730 (outs SPR:$Sd), (ins SPR:$Sm),
1731 IIC_fpCVTSI, "vcvtr", ".s32.f32\t$Sd, $Sm",
1732 [(set SPR:$Sd, (int_arm_vcvtr SPR:$Sm))]>,
1738 (outs SPR:$Sd), (ins SPR:$Sm),
1739 IIC_fpCVTHI, "vcvtr", ".s32.f16\t$Sd, $Sm",
1755 (outs SPR:$Sd), (ins SPR:$Sm),
1756 IIC_fpCVTSI, "vcvtr", ".u32.f32\t$Sd, $Sm",
1757 [(set SPR:$Sd, (int_arm_vcvtru SPR:$Sm))]>,
1763 (outs SPR:$Sd), (ins SPR:$Sm),
1764 IIC_fpCVTHI, "vcvtr", ".u32.f16\t$Sd, $Sm",
1993 : VFPAI<(outs SPR:$Sd), (ins SPR:$dst, SPR:$Sm),
1995 opc, ".bf16.f32\t$Sd, $Sm", "", []>,
2000 bits<5> Sm;
2003 let Inst{3-0} = Sm{4-1};
2004 let Inst{5} = Sm{0};
2036 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2037 IIC_fpMAC32, "vmla", ".f32\t$Sd, $Sn, $Sm",
2038 [(set SPR:$Sd, (fadd_mlx (fmul_su SPR:$Sn, SPR:$Sm),
2049 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2050 IIC_fpMAC16, "vmla", ".f16\t$Sd, $Sn, $Sm",
2051 [(set (f16 HPR:$Sd), (fadd_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)),
2077 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2078 IIC_fpMAC32, "vmls", ".f32\t$Sd, $Sn, $Sm",
2079 [(set SPR:$Sd, (fadd_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2090 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2091 IIC_fpMAC16, "vmls", ".f16\t$Sd, $Sn, $Sm",
2092 [(set (f16 HPR:$Sd), (fadd_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2117 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2118 IIC_fpMAC32, "vnmla", ".f32\t$Sd, $Sn, $Sm",
2119 [(set SPR:$Sd, (fsub_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2130 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2131 IIC_fpMAC16, "vnmla", ".f16\t$Sd, $Sn, $Sm",
2132 [(set (f16 HPR:$Sd), (fsub_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2169 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2170 IIC_fpMAC32, "vnmls", ".f32\t$Sd, $Sn, $Sm",
2171 [(set SPR:$Sd, (fsub_mlx (fmul_su SPR:$Sn, SPR:$Sm), SPR:$Sdin))]>,
2181 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2182 IIC_fpMAC16, "vnmls", ".f16\t$Sd, $Sn, $Sm",
2183 … [(set (f16 HPR:$Sd), (fsub_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)), (f16 HPR:$Sdin)))]>,
2210 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2211 IIC_fpFMAC32, "vfma", ".f32\t$Sd, $Sn, $Sm",
2212 [(set SPR:$Sd, (fadd_mlx (fmul_su SPR:$Sn, SPR:$Sm),
2222 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2223 IIC_fpFMAC16, "vfma", ".f16\t$Sd, $Sn, $Sm",
2224 [(set (f16 HPR:$Sd), (fadd_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)),
2245 def : Pat<(f32 (fma SPR:$Sn, SPR:$Sm, SPR:$Sdin)),
2246 (VFMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2248 def : Pat<(f16 (fma HPR:$Sn, HPR:$Sm, (f16 HPR:$Sdin))),
2249 (VFMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2262 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2263 IIC_fpFMAC32, "vfms", ".f32\t$Sd, $Sn, $Sm",
2264 [(set SPR:$Sd, (fadd_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2274 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2275 IIC_fpFMAC16, "vfms", ".f16\t$Sd, $Sn, $Sm",
2276 [(set (f16 HPR:$Sd), (fadd_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2297 def : Pat<(f32 (fma (fneg SPR:$Sn), SPR:$Sm, SPR:$Sdin)),
2298 (VFMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2300 def : Pat<(f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (f16 HPR:$Sdin))),
2301 (VFMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2314 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2315 IIC_fpFMAC32, "vfnma", ".f32\t$Sd, $Sn, $Sm",
2316 [(set SPR:$Sd, (fsub_mlx (fneg (fmul_su SPR:$Sn, SPR:$Sm)),
2326 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2327 IIC_fpFMAC16, "vfnma", ".f16\t$Sd, $Sn, $Sm",
2328 [(set (f16 HPR:$Sd), (fsub_mlx (fneg (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm))),
2346 def : Pat<(fneg (fma (f32 SPR:$Sn), (f32 SPR:$Sm), (f32 SPR:$Sdin))),
2347 (VFNMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2349 def : Pat<(fneg (fma (f16 HPR:$Sn), (f16 HPR:$Sm), (f16 (f16 HPR:$Sdin)))),
2350 (VFNMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2356 def : Pat<(f32 (fma (fneg SPR:$Sn), SPR:$Sm, (fneg SPR:$Sdin))),
2357 (VFNMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2359 def : Pat<(f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (fneg (f16 HPR:$Sdin)))),
2360 (VFNMAH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2373 (outs SPR:$Sd), (ins SPR:$Sdin, SPR:$Sn, SPR:$Sm),
2374 IIC_fpFMAC32, "vfnms", ".f32\t$Sd, $Sn, $Sm",
2375 [(set SPR:$Sd, (fsub_mlx (fmul_su SPR:$Sn, SPR:$Sm), SPR:$Sdin))]>,
2384 (outs HPR:$Sd), (ins HPR:$Sdin, HPR:$Sn, HPR:$Sm),
2385 IIC_fpFMAC16, "vfnms", ".f16\t$Sd, $Sn, $Sm",
2386 … [(set (f16 HPR:$Sd), (fsub_mlx (fmul_su (f16 HPR:$Sn), (f16 HPR:$Sm)), (f16 HPR:$Sdin)))]>,
2404 def : Pat<(f32 (fma SPR:$Sn, SPR:$Sm, (fneg SPR:$Sdin))),
2405 (VFNMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2407 def : Pat<(f16 (fma (f16 HPR:$Sn), (f16 HPR:$Sm), (fneg (f16 HPR:$Sdin)))),
2408 (VFNMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2414 def : Pat<(fneg (f32 (fma (fneg SPR:$Sn), SPR:$Sm, SPR:$Sdin))),
2415 (VFNMSS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
2417 def : Pat<(fneg (f16 (fma (fneg (f16 HPR:$Sn)), (f16 HPR:$Sm), (f16 HPR:$Sdin)))),
2418 (VFNMSH (f16 HPR:$Sdin), (f16 HPR:$Sn), (f16 HPR:$Sm))>,
2432 def VMOVScc : PseudoInst<(outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm, cmovpred:$p),
2435 (ARMcmov SPR:$Sn, SPR:$Sm, cmovpred:$p))]>,
2438 def VMOVHcc : PseudoInst<(outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm, cmovpred:$p),
2441 (ARMcmov (f16 HPR:$Sn), (f16 HPR:$Sm), cmovpred:$p))]>,
2723 def : VFP2InstAlias<"fadds${p} $Sd, $Sn, $Sm",
2724 (VADDS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p)>;
2727 def : VFP2InstAlias<"fsubs${p} $Sd, $Sn, $Sm",
2728 (VSUBS SPR:$Sd, SPR:$Sn, SPR:$Sm, pred:$p)>;
2733 def : VFP2InstAlias<"vsqrt${p} $Sd, $Sm", (VSQRTS SPR:$Sd, SPR:$Sm, pred:$p)>;
2767 def : VFP2InstAlias<"vmov${p} $Sd, $Sm",
2768 (VMOVS SPR:$Sd, SPR:$Sm, pred:$p)>;