Lines Matching refs:Rn
423 def tADDspi : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, t_imm0_508s4:$imm),
434 def tSUBspi : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, t_imm0_508s4:$imm),
455 def tADDrSP : T1pI<(outs GPR:$Rdn), (ins GPRsp:$sp, GPR:$Rn), IIC_iALUr,
456 "add", "\t$Rdn, $sp, $Rn", []>,
467 def tADDspr : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, GPR:$Rm), IIC_iALUr,
826 def tLDMIA : T1I<(outs), (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops),
827 IIC_iLoad_m, "ldm${p}\t$Rn, $regs", []>, T1Encoding<{1,1,0,0,1,?}> {
828 bits<3> Rn;
830 let Inst{10-8} = Rn;
840 "$Rn = $wb", IIC_iLoad_mu>,
841 PseudoInstExpansion<(tLDMIA tGPR:$Rn, pred:$p, reglist:$regs)> {
844 let InOperandList = (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops);
854 (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops),
856 "stm${p}\t$Rn!, $regs", "$Rn = $wb", []>,
858 bits<3> Rn;
860 let Inst{10-8} = Rn;
866 def : InstAlias<"ldm${p} $Rn!, $regs",
867 (tLDMIA tGPR:$Rn, pred:$p, reglist:$regs), 0>,
901 bits<3> Rn;
903 let Inst{2-0} = Rn;
921 bits<3> Rn;
922 let Inst{5-3} = Rn;
930 bits<3> Rn;
933 let Inst{5-3} = Rn;
970 T1sItDPEncode<0b0101, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm), IIC_iALUr,
987 (ins tGPR:$Rn, imm0_255:$imm8), IIC_iALUi,
989 [(set tGPR:$Rdn, (add tGPR:$Rn, imm8_255:$imm8))]>,
995 T1sIGenEncode<0b01100, (outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
997 "add", "\t$Rd, $Rn, $Rm",
998 [(set tGPR:$Rd, (add tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1007 def tADCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1009 [(set tGPR:$Rdn, CPSR, (ARMadde tGPR:$Rn, tGPR:$Rm,
1021 def tADDSi8 : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, imm0_255:$imm8),
1023 [(set tGPR:$Rdn, CPSR, (ARMaddc tGPR:$Rn,
1029 def tADDSrr : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1031 [(set tGPR:$Rd, CPSR, (ARMaddc tGPR:$Rn,
1038 def tADDhirr : T1pIt<(outs GPR:$Rdn), (ins GPR:$Rn, GPR:$Rm), IIC_iALUr,
1052 def : T1Pat<(or AddLikeOrOp:$Rn, imm0_7:$imm), (tADDi3 $Rn, imm0_7:$imm)>;
1054 def : T1Pat<(or AddLikeOrOp:$Rn, imm8_255:$imm), (tADDi8 $Rn, imm8_255:$imm)>;
1056 def : T1Pat<(or AddLikeOrOp:$Rn, tGPR:$Rm), (tADDrr $Rn, $Rm)>;
1071 T1sItDPEncode<0b0000, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1074 [(set tGPR:$Rdn, (and tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1089 T1sItDPEncode<0b0100, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1092 [(set tGPR:$Rdn, (sra tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1096 T1sItDPEncode<0b1110, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1099 [(set tGPR:$Rdn, (and tGPR:$Rn, (not tGPR:$Rm)))]>,
1113 T1pIDPEncode<0b1011, (outs), (ins tGPR:$Rn, tGPR:$Rm),
1115 "cmn", "\t$Rn, $Rm",
1116 [(ARMcmpZ tGPR:$Rn, (ineg tGPR:$Rm))]>, Sched<[WriteCMP]>;
1122 def tCMPi8 : T1pI<(outs), (ins tGPR:$Rn, imm0_255:$imm8), IIC_iCMPi,
1123 "cmp", "\t$Rn, $imm8",
1124 [(ARMcmp tGPR:$Rn, imm0_255:$imm8)]>,
1127 bits<3> Rn;
1129 let Inst{10-8} = Rn;
1135 T1pIDPEncode<0b1010, (outs), (ins tGPR:$Rn, tGPR:$Rm),
1137 "cmp", "\t$Rn, $Rm",
1138 [(ARMcmp tGPR:$Rn, tGPR:$Rm)]>, Sched<[WriteCMP]>;
1140 def tCMPhir : T1pI<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_iCMPr,
1141 "cmp", "\t$Rn, $Rm", []>,
1145 bits<4> Rn;
1146 let Inst{7} = Rn{3};
1148 let Inst{2-0} = Rn{2-0};
1156 T1sItDPEncode<0b0001, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1159 [(set tGPR:$Rdn, (xor tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1174 T1sItDPEncode<0b0010, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1177 [(set tGPR:$Rdn, (shl tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1192 T1sItDPEncode<0b0011, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1195 [(set tGPR:$Rdn, (srl tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1243 Thumb1sI<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm), AddrModeNone, 2,
1244 IIC_iMUL32, "mul", "\t$Rd, $Rn, $Rm", "$Rm = $Rd",
1245 [(set tGPR:$Rd, (mul tGPR:$Rn, tGPR:$Rm))]>,
1248 bits<3> Rn;
1249 let Inst{5-3} = Rn;
1254 def :tInstAlias<"mul${s}${p} $Rdm, $Rn", (tMUL tGPR:$Rdm, s_cc_out:$s, tGPR:$Rn,
1259 T1sIDPEncode<0b1111, (outs tGPR:$Rd), (ins tGPR:$Rn), IIC_iMVNr,
1260 "mvn", "\t$Rd, $Rn",
1261 [(set tGPR:$Rd, (not tGPR:$Rn))]>, Sched<[WriteALU]>;
1266 T1sItDPEncode<0b1100, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1269 [(set tGPR:$Rdn, (or tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1295 T1sItDPEncode<0b0111, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1298 [(set tGPR:$Rdn, (rotr tGPR:$Rn, tGPR:$Rm))]>,
1303 T1sIDPEncode<0b1001, (outs tGPR:$Rd), (ins tGPR:$Rn),
1305 "rsb", "\t$Rd, $Rn, #0",
1306 [(set tGPR:$Rd, (ineg tGPR:$Rn))]>, Sched<[WriteALU]>;
1311 T1sItDPEncode<0b0110, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1330 (ins tGPR:$Rn, imm0_255:$imm8), IIC_iALUi,
1332 [(set tGPR:$Rdn, (add tGPR:$Rn, imm8_255_neg:$imm8))]>,
1345 T1sIGenEncode<0b01101, (outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1347 "sub", "\t$Rd, $Rn, $Rm",
1348 [(set tGPR:$Rd, (sub tGPR:$Rn, tGPR:$Rm))]>,
1361 def tSBCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1363 [(set tGPR:$Rdn, CPSR, (ARMsube tGPR:$Rn, tGPR:$Rm,
1375 def tSUBSi8 : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, imm0_255:$imm8),
1377 [(set tGPR:$Rdn, CPSR, (ARMsubc tGPR:$Rn,
1382 def tSUBSrr : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1384 [(set tGPR:$Rd, CPSR, (ARMsubc tGPR:$Rn,
1389 def tRSBS : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn),
1391 [(set tGPR:$Rd, CPSR, (ARMsubc 0, tGPR:$Rn))]>,
1395 def tLSLSri : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn, imm0_31:$imm5),
1397 [(set tGPR:$Rd, CPSR, (ARMlsls tGPR:$Rn, imm0_31:$imm5))]>,
1403 def : T1Pat<(ARMsubs tGPR:$Rn, tGPR:$Rm), (tSUBSrr $Rn, $Rm)>;
1404 def : T1Pat<(ARMsubs tGPR:$Rn, imm0_7:$imm3), (tSUBSi3 $Rn, imm0_7:$imm3)>;
1405 def : T1Pat<(ARMsubs tGPR:$Rn, imm0_255:$imm8), (tSUBSi8 $Rn, imm0_255:$imm8)>;
1429 T1pIDPEncode<0b1000, (outs), (ins tGPR:$Rn, tGPR:$Rm), IIC_iTSTr,
1430 "tst", "\t$Rn, $Rm",
1431 [(ARMcmpZ (and_su tGPR:$Rn, tGPR:$Rm), 0)]>,
1572 def : T1Pat<(ARMcmpZ tGPR:$Rn, imm0_255:$imm8),
1573 (tCMPi8 tGPR:$Rn, imm0_255:$imm8)>;
1574 def : T1Pat<(ARMcmpZ tGPR:$Rn, tGPR:$Rm),
1575 (tCMPr tGPR:$Rn, tGPR:$Rm)>;
1582 def : T1Pat<(srl (bswap top16Zero:$Rn), (i32 16)),
1583 (tREV16 tGPR:$Rn)>;
1584 def : T1Pat<(truncstorei16 (srl (bswap tGPR:$Rn), (i32 16)),
1586 (tSTRHi(tREV16 tGPR:$Rn), t_addrmode_is2:$addr)>;
1587 def : T1Pat<(truncstorei16 (srl (bswap tGPR:$Rn), (i32 16)),
1589 (tSTRHr (tREV16 tGPR:$Rn), t_addrmode_rr:$addr)>;
1655 Constraints = "$Rn = $Rn_wb,@earlyclobber $Rn_wb" in
1657 (ins tGPR:$Rn, pred:$p),
1664 def : T1Pat<(post_store tGPR:$Rt, tGPR:$Rn, 4),
1665 (tSTMIA_UPD tGPR:$Rn, tGPR:$Rt)>;
1671 def : T1Pat<(sextloadi8 tGPR:$Rn),
1672 (tLDRSB tGPR:$Rn, (tMOVi8 0))>,
1674 def : T1Pat<(sextloadi16 tGPR:$Rn),
1675 (tLDRSH tGPR:$Rn, (tMOVi8 0))>,