Lines Matching refs:RegTy
4803 class VDOT<bit op6, bit op4, bit op23, RegisterClass RegTy, string Asm,
4806 N3Vnp<{0b1100, op23}, 0b10, 0b1101, op6, op4, (outs RegTy:$dst),
4807 (ins RegTy:$Vd, RegTy:$Vn, RegTy:$Vm), N3RegFrm, IIC_VDOTPROD,
4809 [(set (AccumTy RegTy:$dst),
4810 (OpNode (AccumTy RegTy:$Vd),
4811 (InputTy RegTy:$Vn),
4812 (InputTy RegTy:$Vm)))]> {
4870 multiclass N3VMixedDotLane<bit Q, bit U, string Asm, string AsmTy, RegisterClass RegTy,
4874 def "" : N3Vnp<0b11101, 0b00, 0b1101, Q, U, (outs RegTy:$dst),
4875 (ins RegTy:$Vd, RegTy:$Vn, DPR_VFP2:$Vm, VectorIndex32:$lane), N3RegFrm,
4885 (AccumTy (OpNode (AccumTy RegTy:$Vd),
4886 (InputTy RegTy:$Vn),
4888 (ARMvduplane (AccumTy RegTy:$Vm),
4890 (!cast<Instruction>(NAME) RegTy:$Vd, RegTy:$Vn, RHS, VectorIndex32:$lane)>;
4894 multiclass SUDOTLane<bit Q, RegisterClass RegTy, ValueType AccumTy, ValueType InputTy, dag RHS>
4895 : N3VMixedDotLane<Q, 1, "vsudot", "u8", RegTy, AccumTy, InputTy, null_frag, null_frag> {
4897 (AccumTy (int_arm_neon_usdot (AccumTy RegTy:$Vd),
4899 (ARMvduplane (AccumTy RegTy:$Vm),
4901 (InputTy RegTy:$Vn))),
4902 (!cast<Instruction>(NAME) RegTy:$Vd, RegTy:$Vn, RHS, VectorIndex32:$lane)>;
9154 class BF16VDOTS<bit Q, RegisterClass RegTy, string opc, ValueType AccumTy, ValueType InputTy>
9155 : BF16VDOT<0b11000, 0b00, Q, (outs RegTy:$dst),
9156 (ins RegTy:$Vd, RegTy:$Vn, RegTy:$Vm),
9157 [(set (AccumTy RegTy:$dst),
9158 (int_arm_neon_bfdot (AccumTy RegTy:$Vd),
9159 (InputTy RegTy:$Vn),
9160 (InputTy RegTy:$Vm)))]> {
9166 multiclass BF16VDOTI<bit Q, RegisterClass RegTy, string opc, ValueType AccumTy,
9169 def "" : BF16VDOT<0b11100, 0b00, Q, (outs RegTy:$dst),
9170 (ins RegTy:$Vd, RegTy:$Vn,
9180 (AccumTy (int_arm_neon_bfdot (AccumTy RegTy:$Vd),
9181 (InputTy RegTy:$Vn),
9183 (ARMvduplane (AccumTy RegTy:$Vm),
9185 (!cast<Instruction>(NAME) RegTy:$Vd, RegTy:$Vn, RHS, VectorIndex32:$lane)>;
9194 class BF16MM<bit Q, RegisterClass RegTy,
9197 (outs RegTy:$dst), (ins RegTy:$Vd, RegTy:$Vn, RegTy:$Vm),