Lines Matching refs:OpNode
2509 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2512 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm))))]>;
2515 string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
2518 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm))))]>;
2574 ValueType TyD, ValueType TyQ, SDNode OpNode>
2577 [(set DPR:$Vd, (TyD (OpNode (TyQ QPR:$Vm))))]>;
2592 ValueType TyQ, ValueType TyD, SDNode OpNode>
2595 [(set QPR:$Vd, (TyQ (OpNode (TyD DPR:$Vm))))]>;
2621 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2625 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> {
2634 SDNode OpNode, bit Commutable>
2638 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]>{
2672 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2676 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]> {
2683 ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable>
2687 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]>{
2851 ValueType Ty, SDPatternOperator MulOp, SDPatternOperator OpNode>
2855 [(set DPR:$Vd, (Ty (OpNode DPR:$src1,
2887 SDPatternOperator MulOp, SDPatternOperator OpNode>
2891 [(set QPR:$Vd, (Ty (OpNode QPR:$src1,
2924 ValueType Ty, SDPatternOperator IntOp, SDNode OpNode>
2928 [(set DPR:$Vd, (Ty (OpNode DPR:$src1,
2932 ValueType Ty, SDPatternOperator IntOp, SDNode OpNode>
2936 [(set QPR:$Vd, (Ty (OpNode QPR:$src1,
2961 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2965 [(set QPR:$Vd, (OpNode (TyQ QPR:$src1),
2970 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2976 (OpNode (TyQ QPR:$src1),
2982 ValueType TyQ, ValueType TyD, SDNode MulOp, SDNode OpNode>
2988 (OpNode (TyQ QPR:$src1),
2997 SDNode OpNode>
3001 [(set QPR:$Vd, (OpNode (TyQ QPR:$src1),
3056 ValueType TyQ, ValueType TyD, SDNode OpNode, bit Commutable>
3060 [(set QPR:$Vd, (TyQ (OpNode (TyD DPR:$Vn), (TyD DPR:$Vm))))]> {
3066 ValueType TyQ, ValueType TyD, SDNode OpNode>
3071 (TyQ (OpNode (TyD DPR:$Vn),
3075 ValueType TyQ, ValueType TyD, SDNode OpNode>
3080 (TyQ (OpNode (TyD DPR:$Vn),
3086 ValueType TyQ, ValueType TyD, SDNode OpNode, SDPatternOperator ExtOp,
3091 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
3156 SDNode OpNode, SDPatternOperator ExtOp, bit Commutable>
3160 [(set QPR:$Vd, (OpNode (TyQ QPR:$Vn),
3208 string OpcodeStr, string Dt, ValueType Ty, SDNode OpNode>
3212 [(set DPR:$Vd, (Ty (OpNode (Ty DPR:$Vm), (i32 imm:$SIMM))))]>;
3215 string OpcodeStr, string Dt, ValueType Ty, SDNode OpNode>
3219 [(set QPR:$Vd, (Ty (OpNode (Ty QPR:$Vm), (i32 imm:$SIMM))))]>;
3226 SDPatternOperator OpNode>
3230 [(set QPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm), ImmTy:$SIMM)))]>;
3236 SDPatternOperator OpNode>
3240 [(set DPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm),
3455 SDNode OpNode> {
3458 v8i8, v8i16, OpNode>;
3461 v4i16, v4i32, OpNode>;
3464 v2i32, v2i64, OpNode>;
3488 string OpcodeStr, string Dt, SDNode OpNode> {
3490 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, OpNode>;
3492 OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, OpNode>;
3494 OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, OpNode>;
3505 SDNode OpNode, bit Commutable = 0> {
3509 v8i8, v8i8, OpNode, Commutable>;
3512 v4i16, v4i16, OpNode, Commutable>;
3515 v2i32, v2i32, OpNode, Commutable>;
3520 v16i8, v16i8, OpNode, Commutable>;
3523 v8i16, v8i16, OpNode, Commutable>;
3526 v4i32, v4i32, OpNode, Commutable>;
3541 SDNode OpNode, bit Commutable = 0>
3543 OpcodeStr, Dt, OpNode, Commutable> {
3546 v1i64, v1i64, OpNode, Commutable>;
3549 v2i64, v2i64, OpNode, Commutable>;
3696 SDNode OpNode, bit Commutable = 0> {
3699 v8i16, v8i8, OpNode, Commutable>;
3702 v4i32, v4i16, OpNode, Commutable>;
3705 v2i64, v2i32, OpNode, Commutable>;
3710 SDNode OpNode> {
3712 !strconcat(Dt, "16"), v4i32, v4i16, OpNode>;
3714 !strconcat(Dt, "32"), v2i64, v2i32, OpNode>;
3720 SDNode OpNode, SDPatternOperator ExtOp, bit Commutable = 0> {
3723 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3726 v4i32, v4i16, OpNode, ExtOp, Commutable>;
3729 v2i64, v2i32, OpNode, ExtOp, Commutable>;
3788 SDNode OpNode, SDPatternOperator ExtOp, bit Commutable = 0> {
3791 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3794 v4i32, v4i16, OpNode, ExtOp, Commutable>;
3797 v2i64, v2i32, OpNode, ExtOp, Commutable>;
3806 string OpcodeStr, string Dt, SDNode OpNode> {
3809 OpcodeStr, !strconcat(Dt, "8"), v8i8, mul, OpNode>;
3811 OpcodeStr, !strconcat(Dt, "16"), v4i16, mul, OpNode>;
3813 OpcodeStr, !strconcat(Dt, "32"), v2i32, mul, OpNode>;
3817 OpcodeStr, !strconcat(Dt, "8"), v16i8, mul, OpNode>;
3819 OpcodeStr, !strconcat(Dt, "16"), v8i16, mul, OpNode>;
3821 OpcodeStr, !strconcat(Dt, "32"), v4i32, mul, OpNode>;
3845 SDNode OpNode> {
3848 OpcodeStr, !strconcat(Dt, "8"), v8i8, IntOp, OpNode>;
3850 OpcodeStr, !strconcat(Dt, "16"), v4i16, IntOp, OpNode>;
3852 OpcodeStr, !strconcat(Dt, "32"), v2i32, IntOp, OpNode>;
3856 OpcodeStr, !strconcat(Dt, "8"), v16i8, IntOp, OpNode>;
3858 OpcodeStr, !strconcat(Dt, "16"), v8i16, IntOp, OpNode>;
3860 OpcodeStr, !strconcat(Dt, "32"), v4i32, IntOp, OpNode>;
3902 SDNode OpNode> {
3904 !strconcat(Dt, "8"), v8i16, v8i8, MulOp, OpNode>;
3906 !strconcat(Dt, "16"), v4i32, v4i16, MulOp, OpNode>;
3908 !strconcat(Dt, "32"), v2i64, v2i32, MulOp, OpNode>;
3912 string Dt, SDNode MulOp, SDNode OpNode> {
3914 !strconcat(Dt,"16"), v4i32, v4i16, MulOp, OpNode>;
3916 !strconcat(Dt, "32"), v2i64, v2i32, MulOp, OpNode>;
3952 SDPatternOperator IntOp, SDNode ExtOp, SDNode OpNode> {
3955 IntOp, ExtOp, OpNode>;
3958 IntOp, ExtOp, OpNode>;
3961 IntOp, ExtOp, OpNode>;
4016 SDNode OpNode> {
4019 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
4023 OpcodeStr, !strconcat(Dt, "16"), v4i16, OpNode> {
4027 OpcodeStr, !strconcat(Dt, "32"), v2i32, OpNode> {
4031 OpcodeStr, !strconcat(Dt, "64"), v1i64, OpNode>;
4036 OpcodeStr, !strconcat(Dt, "8"), v16i8, OpNode> {
4040 OpcodeStr, !strconcat(Dt, "16"), v8i16, OpNode> {
4044 OpcodeStr, !strconcat(Dt, "32"), v4i32, OpNode> {
4048 OpcodeStr, !strconcat(Dt, "64"), v2i64, OpNode>;
4053 SDNode OpNode> {
4056 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
4060 OpcodeStr, !strconcat(Dt, "16"), v4i16, OpNode> {
4064 OpcodeStr, !strconcat(Dt, "32"), v2i32, OpNode> {
4068 OpcodeStr, !strconcat(Dt, "64"), v1i64, OpNode>;
4073 OpcodeStr, !strconcat(Dt, "8"), v16i8, OpNode> {
4077 OpcodeStr, !strconcat(Dt, "16"), v8i16, OpNode> {
4081 OpcodeStr, !strconcat(Dt, "32"), v4i32, OpNode> {
4085 OpcodeStr, !strconcat(Dt, "64"), v2i64, OpNode>;
4208 SDPatternOperator OpNode> {
4210 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, imm1_7, OpNode> {
4214 OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, imm1_15, OpNode> {
4218 OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, imm1_31, OpNode> {
4227 SDPatternOperator OpNode> {
4230 v8i8, v8i16, shr_imm8, OpNode> {
4235 v4i16, v4i32, shr_imm16, OpNode> {
4240 v2i32, v2i64, shr_imm32, OpNode> {
4805 SDPatternOperator OpNode> :
4810 (OpNode (AccumTy RegTy:$Vd),
4825 ValueType AccumType, ValueType InputType, SDPatternOperator OpNode,
4839 (AccumType (OpNode (AccumType Ty:$Vd),
4859 SDPatternOperator OpNode>
4863 [(set (v4i32 QPR:$dst), (OpNode (v4i32 QPR:$Vd),
4871 ValueType AccumTy, ValueType InputTy, SDPatternOperator OpNode,
4885 (AccumTy (OpNode (AccumTy RegTy:$Vd),
7388 class N2VSPat<SDNode OpNode, NeonI Inst>
7389 : NEONFPPat<(f32 (OpNode SPR:$a)),
7396 class N3VSPat<SDNode OpNode, NeonI Inst>
7397 : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)),
7407 class N3VSPatFP16<SDNode OpNode, NeonI Inst>
7408 : NEONFPPat<(f16 (OpNode HPR:$a, HPR:$b)),
7418 class N3VSMulOpPat<SDNode MulNode, SDNode OpNode, NeonI Inst>
7419 : NEONFPPat<(f32 (OpNode SPR:$acc, (f32 (MulNode SPR:$a, SPR:$b)))),
7432 class NVCVTIFPat<SDNode OpNode, NeonI Inst>
7433 : NEONFPPat<(f32 (OpNode GPR:$a)),
7440 class NVCVTFIPat<SDNode OpNode, NeonI Inst>
7441 : NEONFPPat<(i32 (OpNode SPR:$a)),
9209 class VBF16MALQ<bit T, string suffix, SDPatternOperator OpNode>
9214 (OpNode (v4f32 QPR:$Vd),
9224 multiclass VBF16MALQI<bit T, string suffix, SDPatternOperator OpNode> {
9236 (v4f32 (OpNode (v4f32 QPR:$Vd),