Lines Matching refs:Rm

480   : MVE_ScalarShiftSingleReg<iname, (ins rGPR:$RdaSrc, rGPR:$Rm),
481                      "$RdaSrc, $Rm", "$RdaDest = $RdaSrc",
484                                    (i32 rGPR:$RdaSrc), (i32 rGPR:$Rm))))]> {
485   bits<4> Rm;
487   let Inst{15-12} = Rm{3-0};
534   bits<4> Rm;
537   let Inst{15-12} = Rm{3-0};
553      iname, (ins tGPREven:$RdaLo_src, tGPROdd:$RdaHi_src, rGPR:$Rm),
554      "$RdaLo, $RdaHi, $Rm", op5, 0b0, pattern> {
561      iname, (ins tGPREven:$RdaLo_src, tGPROdd:$RdaHi_src, rGPR:$Rm, saturateop:$sat),
562      "$RdaLo, $RdaHi, $sat, $Rm", op5, 0b1, pattern> {
570                                         tGPROdd:$RdaHi_src, rGPR:$Rm))]>;
576                                         tGPROdd:$RdaHi_src, rGPR:$Rm))]>;
4267   : MVE_p<(outs VCCR:$P0), (ins MQPR:$Qn, GPRwithZR:$Rm, predtype:$fc),
4268            NoItinerary, "vcmp", suffix, "$fc, $Qn, $Rm", vpred_n, "", vecsize, pattern> {
4272   bits<4> Rm;
4285   let Inst{3-0} = Rm{3-0};
5179   bits<4> Rm;
5189   let Inst{3-0} = Rm{3-0};
5193   : MVE_qr_base<(outs MQPR:$Qd), (ins MQPR:$Qn, rGPR:$Rm),
5194                  iname, suffix, "$Qd, $Qn, $Rm", vpred_r, cstr,
5198   : MVE_qr_base<(outs MQPR:$Qd), (ins MQPR:$Qd_src, MQPR:$Qn, rGPR:$Rm),
5199                  iname, suffix, "$Qd, $Qn, $Rm", vpred_n, "$Qd = $Qd_src",
5203   : MVE_p<(outs MQPR:$Qd), (ins MQPR:$Qd_src, rGPR:$Rm), NoItinerary, iname,
5204           suffix, "$Qd, $Rm", vpred_n, "$Qd = $Qd_src", vecsize, pattern> {
5206   bits<4> Rm;
5210   let Inst{3-0} = Rm{3-0};
5471   def : Pat<(v4i32 (ARMvshlu (v4i32 MQPR:$Qm), (v4i32 (ARMvdup rGPR:$Rm)))),
5472             (v4i32 (MVE_VSHL_qru32 (v4i32 MQPR:$Qm), rGPR:$Rm))>;
5473   def : Pat<(v8i16 (ARMvshlu (v8i16 MQPR:$Qm), (v8i16 (ARMvdup rGPR:$Rm)))),
5474             (v8i16 (MVE_VSHL_qru16 (v8i16 MQPR:$Qm), rGPR:$Rm))>;
5475   def : Pat<(v16i8 (ARMvshlu (v16i8 MQPR:$Qm), (v16i8 (ARMvdup rGPR:$Rm)))),
5476             (v16i8 (MVE_VSHL_qru8 (v16i8 MQPR:$Qm), rGPR:$Rm))>;
5478   def : Pat<(v4i32 (ARMvshls (v4i32 MQPR:$Qm), (v4i32 (ARMvdup rGPR:$Rm)))),
5479             (v4i32 (MVE_VSHL_qrs32 (v4i32 MQPR:$Qm), rGPR:$Rm))>;
5480   def : Pat<(v8i16 (ARMvshls (v8i16 MQPR:$Qm), (v8i16 (ARMvdup rGPR:$Rm)))),
5481             (v8i16 (MVE_VSHL_qrs16 (v8i16 MQPR:$Qm), rGPR:$Rm))>;
5482   def : Pat<(v16i8 (ARMvshls (v16i8 MQPR:$Qm), (v16i8 (ARMvdup rGPR:$Rm)))),
5483             (v16i8 (MVE_VSHL_qrs8 (v16i8 MQPR:$Qm), rGPR:$Rm))>;
5504   def : Pat<(VTI.Vec (int_arm_mve_vbrsr (VTI.Vec MQPR:$Qn), (i32 rGPR:$Rm))),
5505             (VTI.Vec (Inst (VTI.Vec MQPR:$Qn), (i32 rGPR:$Rm)))>;
5509                           (VTI.Vec MQPR:$Qn), (i32 rGPR:$Rm),
5511             (VTI.Vec (Inst (VTI.Vec MQPR:$Qn), (i32 rGPR:$Rm),
5799           (ins tGPREven:$Rn_src, tGPROdd:$Rm, MVE_VIDUP_imm:$imm), NoItinerary,
5800           iname, suffix, "$Qd, $Rn, $Rm, $imm", vpred_r, "$Rn = $Rn_src", size,
5803   bits<4> Rm;
5818   let Inst{3-1} = Rm{3-1};
6655           "$fc, $Qn, $Rm"> {
6656   bits<4> Rm;
6662   let Inst{3-0} = Rm{3-0};
6667             (ins vpt_mask:$Mk, MQPR:$Qn, GPRwithZR:$Rm, pred_basic_i:$fc)> {
6678             (ins vpt_mask:$Mk, MQPR:$Qn, GPRwithZR:$Rm, pred_basic_u:$fc)> {
6689             (ins vpt_mask:$Mk, MQPR:$Qn, GPRwithZR:$Rm, pred_basic_s:$fc)> {
6739   : MVE_VPTf<suffix, size, (ins vpt_mask:$Mk, MQPR:$Qn, GPRwithZR:$Rm, pred_basic_fp:$fc),
6740           "$fc, $Qn, $Rm"> {
6742   bits<4> Rm;
6746   let Inst{3-0} = Rm{3-0};