Lines Matching refs:opc1

4582 class SMLAL<bits<2> opc1, string asm>
4583  : AMulxyI64<0b0001010, opc1,
5356 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
5358             NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5359             [(int_arm_cdp timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5362   bits<4> opc1;
5375   let Inst{23-20} = opc1;
5380 def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
5382                NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5383                [(int_arm_cdp2 timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5387   bits<4> opc1;
5400   let Inst{23-20} = opc1;
5586         "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2", pattern> {
5592   bits<3> opc1;
5599   let Inst{23-21} = opc1;
5609                     (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5611                     [(int_arm_mcr timm:$cop, timm:$opc1, GPR:$Rt, timm:$CRn,
5614 def : ARMInstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
5615                    (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5619                     (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5622 def : ARMInstAlias<"mrc${p} $cop, $opc1, $Rt, $CRn, $CRm",
5623                    (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5626 def : ARMPat<(int_arm_mrc timm:$cop, timm:$opc1, timm:$CRn, timm:$CRm, timm:$opc2),
5627              (MRC p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>;
5632          !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"), pattern> {
5639   bits<3> opc1;
5646   let Inst{23-21} = opc1;
5656                       (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5658                       [(int_arm_mcr2 timm:$cop, timm:$opc1, GPR:$Rt, timm:$CRn,
5661 def : ARMInstAlias<"mcr2 $cop, $opc1, $Rt, $CRn, $CRm",
5662                    (MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5666                       (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5669 def : ARMInstAlias<"mrc2 $cop, $opc1, $Rt, $CRn, $CRm",
5670                    (MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5673 def : ARMV5TPat<(int_arm_mrc2 timm:$cop, timm:$opc1, timm:$CRn,
5675                 (MRC2 p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>;
5679   : ABI<0b1100, oops, iops, NoItinerary, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm",
5688   bits<4> opc1;
5694   let Inst{7-4}   = opc1;
5699                       (outs), (ins p_imm:$cop, imm0_15:$opc1, GPRnopc:$Rt,
5701                       [(int_arm_mcrr timm:$cop, timm:$opc1, GPRnopc:$Rt,
5705                       (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRm), []>;
5710          !strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern>,
5719   bits<4> opc1;
5725   let Inst{7-4}   = opc1;
5732                         (outs), (ins p_imm:$cop, imm0_15:$opc1, GPRnopc:$Rt,
5734                         [(int_arm_mcrr2 timm:$cop, timm:$opc1, GPRnopc:$Rt,
5739                        (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRm), []>;