Lines Matching refs:Ra
4038 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4040 "\t$Rd, $Rn, $Rm, $Ra",
4041 [(set GPR:$Rd, (int_arm_usada8 GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4046 bits<4> Ra;
4050 let Inst{15-12} = Ra;
4322 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra),
4323 IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra",
4324 [(set GPRnopc:$Rd, (add (mul GPRnopc:$Rn, GPRnopc:$Rm), GPRnopc:$Ra))]>,
4327 bits<4> Ra;
4328 let Inst{15-12} = Ra;
4333 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra,
4335 [(set GPRnopc:$Rd, (add (mul GPRnopc:$Rn, GPRnopc:$Rm), GPRnopc:$Ra))],
4336 (MLA GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra, pred:$p, cc_out:$s)>,
4340 def MLS : AMul1I<0b0000011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4341 IIC_iMAC32, "mls", "\t$Rd, $Rn, $Rm, $Ra",
4342 [(set GPR:$Rd, (sub GPR:$Ra, (mul GPR:$Rn, GPR:$Rm)))]>,
4348 bits<4> Ra;
4350 let Inst{15-12} = Ra;
4461 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4462 IIC_iMAC32, "smmla", "\t$Rd, $Rn, $Rm, $Ra",
4463 [(set GPR:$Rd, (add (mulhs GPR:$Rn, GPR:$Rm), GPR:$Ra))]>,
4468 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4469 IIC_iMAC32, "smmlar", "\t$Rd, $Rn, $Rm, $Ra",
4470 [(set GPR:$Rd, (ARMsmmlar GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4475 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4476 IIC_iMAC32, "smmls", "\t$Rd, $Rn, $Rm, $Ra", []>,
4481 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4482 IIC_iMAC32, "smmlsr", "\t$Rd, $Rn, $Rm, $Ra",
4483 [(set GPR:$Rd, (ARMsmmlsr GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4529 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4530 IIC_iMAC16, !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm, $Ra",
4531 [(set GPRnopc:$Rd, (add GPR:$Ra,
4537 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4538 IIC_iMAC16, !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm, $Ra",
4539 [(set GPRnopc:$Rd, (add GPR:$Ra,
4545 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4546 IIC_iMAC16, !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm, $Ra",
4547 [(set GPRnopc:$Rd, (add GPR:$Ra,
4553 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4554 IIC_iMAC16, !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm, $Ra",
4555 [(set GPRnopc:$Rd, (add GPR:$Ra,
4561 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4562 IIC_iMAC16, !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm, $Ra",
4564 (add GPR:$Ra, (ARMsmulwb GPRnopc:$Rn, GPRnopc:$Rm)))]>,
4569 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4570 IIC_iMAC16, !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm, $Ra",
4572 (add GPR:$Ra, (ARMsmulwt GPRnopc:$Rn, GPRnopc:$Rm)))]>,
4632 bits<4> Ra;
4635 let Inst{15-12} = Ra;
4649 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4650 NoItinerary, !strconcat(opc, "d"), "\t$Rd, $Rn, $Rm, $Ra">,
4654 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4655 NoItinerary, !strconcat(opc, "dx"), "\t$Rd, $Rn, $Rm, $Ra">,
4676 def : ARMV6Pat<(int_arm_smlad GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4677 (SMLAD GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra)>;
4678 def : ARMV6Pat<(int_arm_smladx GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4679 (SMLADX GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra)>;
4680 def : ARMV6Pat<(int_arm_smlsd GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4681 (SMLSD GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra)>;
4682 def : ARMV6Pat<(int_arm_smlsdx GPRnopc:$Rn, GPRnopc:$Rm, GPR:$Ra),
4683 (SMLSDX GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra)>;
6400 def : InstAlias<"mla${s}${p} $Rd, $Rn, $Rm, $Ra",
6401 (MLA GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra,