Lines Matching refs:getNode
2138 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2141 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2143 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2145 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2154 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2157 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2159 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2162 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2206 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2209 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
2210 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2223 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2224 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2238 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
2273 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in computeAddrForCallArg()
2290 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
2299 if (!StackPtr.getNode()) in PassF64ArgInRegs()
2471 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2474 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2477 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2480 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2504 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerCall()
2505 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerCall()
2506 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2512 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2514 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2567 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
2589 SDValue Src = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, SrcOffset); in LowerCall()
2597 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, in LowerCall()
2613 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
2655 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2669 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2684 Callee = DAG.getNode( in LowerCall()
2705 DAG.getNode(ARMISD::Wrapper, dl, PtrVt, Callee), in LowerCall()
2721 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2726 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVt, Callee, PICLabel); in LowerCall()
2817 if (InFlag.getNode()) in LowerCall()
2823 SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops); in LowerCall()
2824 DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo)); in LowerCall()
2829 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); in LowerCall()
2830 DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge); in LowerCall()
2832 DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo)); in LowerCall()
2975 (!isa<GlobalAddressSDNode>(Callee.getNode()) || isIndirect)) { in IsEligibleForTailCallOptimization()
3133 return DAG.getNode(ARMISD::INTRET_FLAG, DL, MVT::Other, RetOps); in LowerInterruptReturn()
3210 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3224 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerReturn()
3225 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerReturn()
3226 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3234 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3236 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3253 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3258 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3292 if (Flag.getNode()) in LowerReturn()
3310 return DAG.getNode(RetNode, dl, MVT::Other, RetOps); in LowerReturn()
3341 if (Copies.count(UseChain.getNode())) in isUsedByReturnOnly()
3405 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER()
3407 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER()
3410 return DAG.getNode(ISD::WRITE_REGISTER, DL, MVT::Other, Ops); in LowerWRITE_REGISTER()
3453 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
3480 CPAddr = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, CPAddr); in LowerBlockAddress()
3487 return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel); in LowerBlockAddress()
3552 DAG.getNode(ARMISD::CALL, DL, DAG.getVTList(MVT::Other, MVT::Glue), in LowerGlobalTLSAddressDarwin()
3575 SDValue CurrentTEB = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in LowerGlobalTLSAddressWindows()
3584 DAG.getNode(ISD::ADD, DL, PtrVT, TEB, DAG.getIntPtrConstant(0x2c, DL)); in LowerGlobalTLSAddressWindows()
3593 TLSIndex = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, TLSIndex); in LowerGlobalTLSAddressWindows()
3596 SDValue Slot = DAG.getNode(ISD::SHL, DL, PtrVT, TLSIndex, in LowerGlobalTLSAddressWindows()
3599 DAG.getNode(ISD::ADD, DL, PtrVT, TLSArray, Slot), in LowerGlobalTLSAddressWindows()
3607 DAG.getNode(ARMISD::Wrapper, DL, MVT::i32, in LowerGlobalTLSAddressWindows()
3611 return DAG.getNode(ISD::ADD, DL, PtrVT, TLS, Offset); in LowerGlobalTLSAddressWindows()
3628 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
3635 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
3666 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
3679 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3686 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
3697 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3705 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
3846 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in promoteToConstantPool()
3888 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3897 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3905 RelAddr = DAG.getNode(ARMISD::Wrapper, dl, PtrVT, G); in LowerGlobalAddressELF()
3910 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3916 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, RelAddr); in LowerGlobalAddressELF()
3926 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
3930 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3954 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G); in LowerGlobalAddressDarwin()
3985 Result = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, in LowerGlobalAddressWindows()
3998 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
4006 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
4013 return DAG.getNode(ARMISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other, in LowerEH_SJLJ_SETUP_DISPATCH()
4068 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
4074 DAG.getNode(ISD::SRA, dl, VTy, Operand, DAG.getConstant(31, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4075 SDValue XOR = DAG.getNode(ISD::XOR, dl, VTy, SRA, Operand); in LowerINTRINSIC_WO_CHAIN()
4077 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4079 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4080 SDValue Result = DAG.getNode(ISD::CTLZ, dl, VTy, OR); in LowerINTRINSIC_WO_CHAIN()
4089 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4091 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4096 SDValue SRAHi = DAG.getNode(ISD::SRA, dl, VTy, Hi, Constant31); in LowerINTRINSIC_WO_CHAIN()
4097 SDValue XORHi = DAG.getNode(ISD::XOR, dl, VTy, SRAHi, Hi); in LowerINTRINSIC_WO_CHAIN()
4098 SDValue SHLHi = DAG.getNode(ISD::SHL, dl, VTy, XORHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4099 SDValue ORHi = DAG.getNode(ISD::OR, dl, VTy, SHLHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4100 SDValue CLSHi = DAG.getNode(ISD::CTLZ, dl, VTy, ORHi); in LowerINTRINSIC_WO_CHAIN()
4107 SDValue CLZAdjustedLo = DAG.getNode(ISD::CTLZ, dl, VTy, AdjustedLo); in LowerINTRINSIC_WO_CHAIN()
4110 DAG.getNode(ISD::ADD, dl, VTy, CLZAdjustedLo, Constant31), CLSHi); in LowerINTRINSIC_WO_CHAIN()
4125 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
4132 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
4137 return DAG.getNode(ISD::ABS, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4143 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4150 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4159 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4168 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4173 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4177 return DAG.getNode(ARMISD::VTBL1, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4180 return DAG.getNode(ARMISD::VTBL2, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4184 return DAG.getNode(ARMISD::PREDICATE_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4187 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4190 return DAG.getNode(ARMISD::LSLL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4193 return DAG.getNode(ARMISD::ASRL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4212 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4230 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4257 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
4310 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
4366 FIN = DAG.getNode(ISD::ADD, dl, PtrVT, FIN, DAG.getConstant(4, dl, PtrVT)); in StoreByValRegs()
4370 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
4404 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
4405 Val = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::getIntegerVT(PartBits), Val); in splitValueIntoRegisterParts()
4406 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in splitValueIntoRegisterParts()
4423 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(PartBits), Val); in joinRegisterPartsIntoValue()
4424 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
4425 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in joinRegisterPartsIntoValue()
4519 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4520 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4522 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4563 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4566 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
4568 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4571 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
4573 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4666 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
4691 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp()
4761 auto *RHSC = cast<ConstantSDNode>(RHS.getNode()); in getARMCmp()
4767 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt); in getARMCmp()
4786 SDValue Shift = DAG.getNode(ARMISD::LSLS, dl, in getARMCmp()
4825 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
4835 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPE : ARMISD::CMPFP, in getVFPCmp()
4838 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPEw0 : ARMISD::CMPFPw0, in getVFPCmp()
4840 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
4850 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4856 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4859 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0)); in duplicateCmp()
4861 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
4888 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4889 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4895 Value = DAG.getNode(ARMISD::ADDC, dl, in getARMXALUOOp()
4898 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4902 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4903 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4907 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4908 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4913 Value = DAG.getNode(ISD::UMUL_LOHI, dl, in getARMXALUOOp()
4916 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4924 Value = DAG.getNode(ISD::SMUL_LOHI, dl, in getARMXALUOOp()
4927 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4928 DAG.getNode(ISD::SRA, dl, Op.getValueType(), in getARMXALUOOp()
4954 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerSignedALUO()
4958 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerSignedALUO()
4968 SDValue Carry = DAG.getNode(ARMISD::SUBC, DL, in ConvertBooleanCarryToCarryFlag()
4980 return DAG.getNode(ARMISD::ADDE, DL, DAG.getVTList(VT, MVT::i32), in ConvertCarryFlagToBooleanCarry()
5003 Value = DAG.getNode(ARMISD::ADDC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5008 Value = DAG.getNode(ARMISD::SUBC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5013 Overflow = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerUnsignedALUO()
5019 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerUnsignedALUO()
5070 DAG.getNode(NewOpcode, dl, MVT::i32, in LowerADDSUBSAT()
5073 return DAG.getNode(ISD::TRUNCATE, dl, VT, Add); in LowerADDSUBSAT()
5124 if (True.getNode() && False.getNode()) { in LowerSELECT()
5137 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
5199 FalseVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5201 TrueVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5209 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV()
5211 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV()
5214 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High); in getCMOV()
5216 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
5310 return DAG.getNode(ARMISD::SSAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5313 return DAG.getNode(ARMISD::USAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5390 SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, SatValue, in LowerSELECT_CC()
5393 SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, in LowerSELECT_CC()
5395 return DAG.getNode(ISD::AND, dl, VT, SatValue, NotShiftV); in LowerSELECT_CC()
5397 return DAG.getNode(ISD::OR, dl, VT, SatValue, ShiftV); in LowerSELECT_CC()
5452 return DAG.getNode(Opcode, dl, VT, TrueVal, FalseVal, ARMcc, Cmp); in LowerSELECT_CC()
5462 if (!RHS.getNode()) { in LowerSELECT_CC()
5541 SDNode *N = Op.getNode(); in canChangeToInt()
5589 SDValue NewPtr = DAG.getNode(ISD::ADD, dl, in expandf64Toi32()
5628 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5630 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5634 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5642 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
5643 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5648 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5684 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5705 if (!RHS.getNode()) { in LowerBR_CC()
5738 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5746 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5765 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5769 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5783 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI); in LowerBR_JT()
5784 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, dl, PTy)); in LowerBR_JT()
5785 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Index); in LowerBR_JT()
5791 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
5799 Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Addr); in LowerBR_JT()
5800 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5806 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5817 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5834 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5836 Op = DAG.getNode(Op.getOpcode(), dl, NewTy, Op.getOperand(0)); in LowerVectorFP_TO_INT()
5837 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
5870 DAG.getNode(Op.getOpcode() == ISD::STRICT_FP_TO_SINT ? ISD::FP_TO_SINT in LowerFP_TO_INT()
5906 SDValue CVT = DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in LowerFP_TO_INT_SAT()
5908 SDValue Max = DAG.getNode(IsSigned ? ISD::SMIN : ISD::UMIN, DL, VT, CVT, in LowerFP_TO_INT_SAT()
5911 Max = DAG.getNode(ISD::SMAX, DL, VT, Max, in LowerFP_TO_INT_SAT()
5923 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5940 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5956 Op = DAG.getNode(CastOpc, dl, DestVecType, Op.getOperand(0)); in LowerVectorINT_TO_FP()
5957 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
5994 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
5998 Mask = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5999 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
6002 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
6004 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
6006 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
6007 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
6010 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN()
6011 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
6013 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
6014 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
6018 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
6019 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
6020 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
6022 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
6023 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
6024 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
6026 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
6027 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
6030 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
6038 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6040 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
6045 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
6047 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
6048 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
6049 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
6050 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
6054 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6057 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
6058 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
6059 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
6077 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
6127 SDValue Read = DAG.getNode(ISD::READ_REGISTER, DL, in ExpandREAD_REGISTER()
6132 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Read.getValue(0), in ExpandREAD_REGISTER()
6182 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
6183 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, in CombineVMOVDRRCandidateWithVecOp()
6206 DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), MVT::i32, Op)); in ExpandBITCAST()
6210 return DAG.getNode( in ExpandBITCAST()
6224 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6226 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6228 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
6229 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
6237 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6239 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST()
6241 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6244 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
6261 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
6262 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
6282 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
6284 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
6285 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
6287 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
6288 SDValue LoSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
6289 SDValue LoBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
6292 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, LoBigShift, in LowerShiftRightParts()
6295 SDValue HiSmallShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
6297 ? DAG.getNode(Opc, dl, VT, ShOpHi, in LowerShiftRightParts()
6302 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftRightParts()
6324 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
6326 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
6327 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
6328 SDValue HiSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
6330 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
6332 SDValue HiBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
6335 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftLeftParts()
6340 SDValue LoSmallShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
6341 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, in LowerShiftLeftParts()
6360 DAG.getNode(ISD::INTRINSIC_W_CHAIN, dl, {MVT::i32, MVT::Other}, Ops); in LowerFLT_ROUNDS_()
6362 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
6364 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
6366 SDValue And = DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
6388 RMValue = DAG.getNode(ISD::SUB, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6390 RMValue = DAG.getNode(ISD::AND, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6392 RMValue = DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6399 DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, {MVT::i32, MVT::Other}, Ops); in LowerSET_ROUNDING()
6405 FPSCR = DAG.getNode(ISD::AND, DL, MVT::i32, FPSCR, in LowerSET_ROUNDING()
6407 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCR, RMValue); in LowerSET_ROUNDING()
6410 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_ROUNDING()
6421 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
6422 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); in LowerCTTZ()
6428 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6430 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6431 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6439 DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6441 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB); in LowerCTTZ()
6442 return DAG.getNode(ISD::SUB, dl, VT, WidthMinus1, CTLZ); in LowerCTTZ()
6451 SDValue FF = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6453 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF); in LowerCTTZ()
6455 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6457 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6459 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6465 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
6466 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
6482 Res = DAG.getNode(ISD::CTPOP, DL, VT8Bit, Res); in LowerCTPOP()
6496 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
6509 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
6572 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in LowerShift()
6574 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6584 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in LowerShift()
6591 SDValue NegatedCount = DAG.getNode( in LowerShift()
6595 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), NegatedCount); in LowerShift()
6631 ShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in Expand64BitShift()
6640 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6643 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6647 Lo = DAG.getNode(ShPartsOpc, dl, DAG.getVTList(MVT::i32, MVT::i32), Lo, Hi, in Expand64BitShift()
6650 Hi = SDValue(Lo.getNode(), 1); in Expand64BitShift()
6651 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6663 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6665 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6671 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi); in Expand64BitShift()
6674 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
6677 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6717 SDValue CastOp0 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op0); in LowerVSETCC()
6718 SDValue CastOp1 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op1); in LowerVSETCC()
6719 SDValue Cmp = DAG.getNode(ISD::SETCC, dl, SplitVT, CastOp0, CastOp1, in LowerVSETCC()
6721 SDValue Reversed = DAG.getNode(ARMISD::VREV64, dl, SplitVT, Cmp); in LowerVSETCC()
6722 SDValue Merged = DAG.getNode(ISD::AND, dl, SplitVT, Cmp, Reversed); in LowerVSETCC()
6723 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6761 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6763 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6765 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6773 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6775 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6777 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6807 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
6809 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
6813 if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) in LowerVSETCC()
6816 if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { in LowerVSETCC()
6817 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
6818 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
6819 SDValue Result = DAG.getNode(ARMISD::VTST, dl, CmpVT, Op0, Op1); in LowerVSETCC()
6833 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
6835 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) { in LowerVSETCC()
6844 if (SingleOp.getNode()) { in LowerVSETCC()
6845 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, SingleOp, in LowerVSETCC()
6848 Result = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6871 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerSETCCCARRY()
6877 SDValue Cmp = DAG.getNode(ARMISD::SUBE, DL, VTs, LHS, RHS, Carry); in LowerSETCCCARRY()
6886 return DAG.getNode(ARMISD::CMOV, DL, Op.getValueType(), FVal, TVal, ARMcc, in LowerSETCCCARRY()
7064 return DAG.getNode(ARMISD::VMOVDRR, DL, MVT::f64, Lo, Hi); in LowerConstantFP()
7067 return DAG.getNode(ARMISD::VMOVSR, DL, VT, in LowerConstantFP()
7094 SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32, in LowerConstantFP()
7096 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant, in LowerConstantFP()
7119 SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT, in LowerConstantFP()
7122 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7125 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7127 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7136 SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT, NewVal); in LowerConstantFP()
7139 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7142 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7144 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7583 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc()
7585 return DAG.getNode(ARMISD::VCVTN, dl, VT, N1, Op1, in LowerBuildVectorOfFPTrunc()
7629 return DAG.getNode(ARMISD::VCVTL, dl, VT, Op0, in LowerBuildVectorOfFPExt()
7686 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, FirstOp, in LowerBUILD_VECTOR_i1()
7688 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), Ext); in LowerBUILD_VECTOR_i1()
7703 SDValue Base = DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in LowerBUILD_VECTOR_i1()
7709 Base = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Base, V, in LowerBUILD_VECTOR_i1()
7745 return DAG.getNode(ARMISD::VIDUP, DL, DAG.getVTList(VT, MVT::i32), Op0, in LowerBUILD_VECTORToVIDUP()
7761 return N->getOperand(1).getNode() == Op; in IsQRMVEInstruction()
7780 return N->getOperand(2).getNode() == Op; in IsQRMVEInstruction()
7793 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
7820 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7821 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7832 if (Val.getNode()) { in LowerBUILD_VECTOR()
7833 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7834 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7842 if (Val.getNode()) { in LowerBUILD_VECTOR()
7843 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7844 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7852 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
7864 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7865 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7907 if (!Value.getNode() && !ValueCounts.empty()) in LowerBUILD_VECTOR()
7915 if (isOnlyLowElement && !ISD::isNormalLoad(Value.getNode())) in LowerBUILD_VECTOR()
7916 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
7941 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7942 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR()
7946 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7949 N = DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
7961 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops); in LowerBUILD_VECTOR()
7972 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
7977 if (Val.getNode()) in LowerBUILD_VECTOR()
7978 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
7982 if (isConstant && Val.getNode()) in LowerBUILD_VECTOR()
7983 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
8022 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Lower, Upper); in LowerBUILD_VECTOR()
8035 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
8036 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8037 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
8053 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
8160 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8176 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8182 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8187 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8190 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8193 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
8208 Src.ShuffleVec = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
8260 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Shuffle); in ReconstructShuffle()
8373 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
8377 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
8380 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
8385 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
8390 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
8395 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8399 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8403 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8420 if (V2.getNode()->isUndef()) in LowerVECTOR_SHUFFLEv8i8()
8421 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
8424 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, in LowerVECTOR_SHUFFLEv8i8()
8434 SDValue OpLHS = DAG.getNode(ARMISD::VREV64, DL, VT, Op.getOperand(0)); in LowerReverse_VECTOR_SHUFFLE()
8469 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
8473 AllZeroes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllZeroes); in PromoteMVEPredVector()
8484 RecastV1 = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Pred); in PromoteMVEPredVector()
8490 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
8494 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); in PromoteMVEPredVector()
8500 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE_i1()
8509 SDValue cast = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, V1); in LowerVECTOR_SHUFFLE_i1()
8510 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, cast); in LowerVECTOR_SHUFFLE_i1()
8511 SDValue srl = DAG.getNode(ISD::SRL, dl, MVT::i32, rbit, in LowerVECTOR_SHUFFLE_i1()
8513 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, srl); in LowerVECTOR_SHUFFLE_i1()
8535 SDValue BC = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Shuffled); in LowerVECTOR_SHUFFLE_i1()
8536 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, BC, in LowerVECTOR_SHUFFLE_i1()
8538 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerVECTOR_SHUFFLE_i1()
8540 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Shuffled, in LowerVECTOR_SHUFFLE_i1()
8598 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast, in LowerVECTOR_SHUFFLEUsingMovs()
8621 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, in LowerVECTOR_SHUFFLEUsingMovs()
8626 SDValue NewVec = DAG.getNode(ARMISD::BUILD_VECTOR, dl, MVT::v4f32, Parts); in LowerVECTOR_SHUFFLEUsingMovs()
8673 SDValue Elt = DAG.getNode( in LowerVECTOR_SHUFFLEUsingOneOff()
8677 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, VInput, Elt, in LowerVECTOR_SHUFFLEUsingOneOff()
8687 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
8709 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8723 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8725 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
8734 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8739 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8741 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8743 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8746 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8762 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2) in LowerVECTOR_SHUFFLE()
8768 return DAG.getNode(ARMISD::VMOVN, dl, VT, V2, V1, in LowerVECTOR_SHUFFLE()
8771 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8774 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8809 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
8811 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0), in LowerVECTOR_SHUFFLE()
8859 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8860 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
8866 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
8871 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
8872 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
8899 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerINSERT_VECTOR_ELT_i1()
8904 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, in LowerINSERT_VECTOR_ELT_i1()
8906 SDValue BFI = DAG.getNode(ARMISD::BFI, dl, MVT::i32, Conv, Ext, in LowerINSERT_VECTOR_ELT_i1()
8908 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), BFI); in LowerINSERT_VECTOR_ELT_i1()
8943 SDValue IElt = DAG.getNode(ISD::BITCAST, dl, IEltVT, Elt); in LowerINSERT_VECTOR_ELT()
8944 SDValue IVecIn = DAG.getNode(ISD::BITCAST, dl, IVecVT, VecIn); in LowerINSERT_VECTOR_ELT()
8945 SDValue IVecOut = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVecVT, in LowerINSERT_VECTOR_ELT()
8947 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
8962 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerEXTRACT_VECTOR_ELT_i1()
8966 SDValue Shift = DAG.getNode(ISD::SRL, dl, MVT::i32, Conv, in LowerEXTRACT_VECTOR_ELT_i1()
8986 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
9023 SDValue ConVec = DAG.getNode(ISD::UNDEF, dl, ConcatVT); in LowerCONCAT_VECTORS_i1()
9028 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV, in LowerCONCAT_VECTORS_i1()
9030 ConVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ConcatVT, ConVec, Elt, in LowerCONCAT_VECTORS_i1()
9043 SDValue BC = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, ConVec); in LowerCONCAT_VECTORS_i1()
9044 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, BC, in LowerCONCAT_VECTORS_i1()
9046 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerCONCAT_VECTORS_i1()
9048 return DAG.getNode(ARMISD::VCMPZ, dl, VT, ConVec, in LowerCONCAT_VECTORS_i1()
9080 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9081 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
9084 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9085 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
9087 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
9114 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9116 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9118 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9120 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9123 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, SubVec, in LowerEXTRACT_SUBVECTOR()
9125 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerEXTRACT_SUBVECTOR()
9129 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9131 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9133 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9139 return DAG.getNode(ARMISD::VCMPZ, dl, VT, SubVec, in LowerEXTRACT_SUBVECTOR()
9155 DAG.getNode(ISD::AND, DL, FromVT, Op, DAG.getConstant(1, DL, FromVT)); in LowerTruncatei1()
9156 return DAG.getNode(ISD::SETCC, DL, VT, And, DAG.getConstant(0, DL, FromVT), in LowerTruncatei1()
9217 return DAG.getNode(ARMISD::MVETRUNC, DL, ToVT, Lo, Hi); in LowerTruncate()
9242 SDValue Ext = DAG.getNode(Opcode, DL, DAG.getVTList(ExtVT, ExtVT), Op); in LowerVectorExtend()
9246 Ext = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext); in LowerVectorExtend()
9247 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
9250 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Ext, Ext1); in LowerVectorExtend()
9261 SDNode *BVN = N->getOperand(0).getNode(); in isExtendedBUILD_VECTOR()
9288 SDNode *Elt = N->getOperand(i).getNode(); in isExtendedBUILD_VECTOR()
9362 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
9410 DAG.getNode(Opcode, SDLoc(newLoad), LD->getValueType(0), newLoad); in SkipExtensionForVMULL()
9419 SDNode *BVN = N->getOperand(0).getNode(); in SkipExtensionForVMULL()
9448 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
9449 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
9459 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
9460 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
9473 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
9474 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
9521 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
9532 SDValue N00 = SkipExtensionForVMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL()
9533 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL()
9535 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
9536 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9537 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
9538 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9539 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
9549 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9550 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
9551 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9552 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9555 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
9562 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
9563 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9565 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
9566 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9568 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9569 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
9581 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9582 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
9583 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9584 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9589 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9592 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9595 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
9600 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
9601 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9603 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
9604 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9607 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9608 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
9624 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
9625 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
9627 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9629 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9631 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9633 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9639 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
9642 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
9661 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
9662 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
9664 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9666 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9668 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9670 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9676 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
9679 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
9689 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
9690 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
9691 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9692 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
9698 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9701 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9704 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9705 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9708 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9713 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
9714 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
9716 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
9717 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
9720 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
9721 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
9726 SDNode *N = Op.getNode(); in LowerADDSUBCARRY()
9740 Result = DAG.getNode(ARMISD::ADDE, DL, VTs, Op.getOperand(0), in LowerADDSUBCARRY()
9748 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerADDSUBCARRY()
9754 Result = DAG.getNode(ARMISD::SUBE, DL, VTs, Op.getOperand(0), in LowerADDSUBCARRY()
9761 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerADDSUBCARRY()
9766 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry); in LowerADDSUBCARRY()
9834 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
9840 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
9930 SDValue DBZCHK = DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, in LowerDIV_Windows()
9940 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, Op); in WinDBZCheckDenominator()
9941 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator()
9943 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator()
9945 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, in WinDBZCheckDenominator()
9946 DAG.getNode(ISD::OR, DL, MVT::i32, Lo, Hi)); in WinDBZCheckDenominator()
9959 SDValue DBZCHK = WinDBZCheckDenominator(DAG, Op.getNode(), DAG.getEntryNode()); in ExpandDIV_Windows()
9963 SDValue Lower = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Result); in ExpandDIV_Windows()
9964 SDValue Upper = DAG.getNode(ISD::SRL, dl, MVT::i64, Result, in ExpandDIV_Windows()
9966 Upper = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Upper); in ExpandDIV_Windows()
9968 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lower, Upper)); in ExpandDIV_Windows()
9972 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); in LowerPredicateLoad()
9999 Val = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateLoad()
10000 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Load), in LowerPredicateLoad()
10002 SDValue Pred = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Val); in LowerPredicateLoad()
10004 Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred, in LowerPredicateLoad()
10023 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in LowerLOAD()
10029 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerPredicateStore()
10048 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Build, in LowerPredicateStore()
10053 Build = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i1, Ops); in LowerPredicateStore()
10055 SDValue GRP = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Build); in LowerPredicateStore()
10057 GRP = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateStore()
10058 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, GRP), in LowerPredicateStore()
10068 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerSTORE()
10074 SDNode *N = Op.getNode(); in LowerSTORE()
10077 SDValue Lo = DAG.getNode( in LowerSTORE()
10081 SDValue Hi = DAG.getNode( in LowerSTORE()
10099 return (ISD::isBuildVectorAllZeros(N.getNode()) || in isZeroVector()
10105 MaskedLoadSDNode *N = cast<MaskedLoadSDNode>(Op.getNode()); in LowerMLOAD()
10116 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD()
10127 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
10164 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); in LowerVecReduce()
10165 Op0 = DAG.getNode(BaseOpcode, dl, VT, Op0, Rev); in LowerVecReduce()
10172 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10174 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10176 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10178 SDValue Ext3 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10180 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10181 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
10182 Res = DAG.getNode(BaseOpcode, dl, EltVT, Res0, Res1, Op->getFlags()); in LowerVecReduce()
10184 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10186 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10188 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10193 Res = DAG.getNode(ISD::ANY_EXTEND, dl, Op->getValueType(0), Res); in LowerVecReduce()
10230 SDValue Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in ReplaceREADCYCLECOUNTER()
10232 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Cycles32, in ReplaceREADCYCLECOUNTER()
10238 SDLoc dl(V.getNode()); in createGPRPairNode()
10241 DAG.getNode(ISD::SRL, dl, MVT::i64, V, DAG.getConstant(32, dl, MVT::i32)), in createGPRPairNode()
10279 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i64, Lo, Hi)); in ReplaceCMP_SWAP_64Results()
10297 if (!RHS.getNode()) { in LowerFSETCC()
10301 SDValue Result = DAG.getNode(ISD::SETCC, dl, VT, LHS, RHS, in LowerFSETCC()
10371 case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG, Subtarget); in LowerOperation()
10374 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); in LowerOperation()
10375 case ISD::SREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10376 case ISD::UREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10381 case ISD::CTTZ_ZERO_UNDEF: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
10382 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget); in LowerOperation()
10392 case ISD::TRUNCATE: return LowerTruncate(Op.getNode(), DAG, Subtarget); in LowerOperation()
10394 case ISD::ZERO_EXTEND: return LowerVectorExtend(Op.getNode(), DAG, Subtarget); in LowerOperation()
10472 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10475 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10479 SDValue LongMul = DAG.getNode(Opc, dl, in ReplaceLongIntrinsic()
10483 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in ReplaceLongIntrinsic()
10552 if (Res.getNode()) in ReplaceNodeResults()
12359 if (!isConditionalZeroOrAllOnes(Slct.getNode(), AllOnes, CCOp, SwapSelectOps, in combineSelectAndUse()
12365 SDValue FalseVal = DAG.getNode(N->getOpcode(), SDLoc(N), VT, in combineSelectAndUse()
12371 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, in combineSelectAndUse()
12381 if (N0.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12384 if (N1.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12406 if (!IsVUZPShuffleNode(N0.getNode()) || N0.getNode() != N1.getNode() || in AddCombineToVPADD()
12418 SDNode *Unzip = N0.getNode(); in AddCombineToVPADD()
12427 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineToVPADD()
12444 if (!IsVUZPShuffleNode(N00.getNode()) || N00.getNode() != N10.getNode() || in AddCombineVUZPToVPADDL()
12472 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), ConcatVT, in AddCombineVUZPToVPADDL()
12476 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineVUZPToVPADDL()
12508 SDNode *V = Vec.getNode(); in AddCombineBUILD_VECTORToVPADDL()
12522 if (V != ExtVec0->getOperand(0).getNode() || in AddCombineBUILD_VECTORToVPADDL()
12523 V != ExtVec1->getOperand(0).getNode()) in AddCombineBUILD_VECTORToVPADDL()
12575 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, widenType, Ops); in AddCombineBUILD_VECTORToVPADDL()
12577 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineBUILD_VECTORToVPADDL()
12650 SDValue SMLAL = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in AddCombineTo64BitSMLAL16()
12653 SDValue HiMLALResult(SMLAL.getNode(), 1); in AddCombineTo64BitSMLAL16()
12654 SDValue LoMLALResult(SMLAL.getNode(), 0); in AddCombineTo64BitSMLAL16()
12696 SDNode *AddcSubcNode = AddeSubeNode->getOperand(2).getNode(); in AddCombineTo64bitMLAL()
12707 if (AddcSubcOp0.getNode() == AddcSubcOp1.getNode()) in AddCombineTo64bitMLAL()
12728 if (AddeSubeOp0.getNode() == AddeSubeOp1.getNode()) in AddCombineTo64bitMLAL()
12776 if (AddcSubcNode == HiAddSub->getNode() || in AddCombineTo64bitMLAL()
12777 AddcSubcNode->isPredecessorOf(HiAddSub->getNode())) in AddCombineTo64bitMLAL()
12794 LowAddSub->getNode()->getOpcode() == ISD::Constant && in AddCombineTo64bitMLAL()
12795 static_cast<ConstantSDNode *>(LowAddSub->getNode())->getZExtValue() == in AddCombineTo64bitMLAL()
12803 SDValue NewNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), MVT::i32, Ops); in AddCombineTo64bitMLAL()
12816 SDValue MLALNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), in AddCombineTo64bitMLAL()
12820 SDValue HiMLALResult(MLALNode.getNode(), 1); in AddCombineTo64bitMLAL()
12823 SDValue LoMLALResult(MLALNode.getNode(), 0); in AddCombineTo64bitMLAL()
12843 SDNode* AddcNode = AddeNode->getOperand(2).getNode(); in AddCombineTo64bitUMAAL()
12851 UmlalNode = AddcNode->getOperand(0).getNode(); in AddCombineTo64bitUMAAL()
12854 UmlalNode = AddcNode->getOperand(1).getNode(); in AddCombineTo64bitUMAAL()
12866 AddeNode->getOperand(1).getNode() == UmlalNode) || in AddCombineTo64bitUMAAL()
12867 (AddeNode->getOperand(0).getNode() == UmlalNode && in AddCombineTo64bitUMAAL()
12872 SDValue UMAAL = DAG.getNode(ARMISD::UMAAL, SDLoc(AddcNode), in AddCombineTo64bitUMAAL()
12876 DAG.ReplaceAllUsesOfValueWith(SDValue(AddeNode, 0), SDValue(UMAAL.getNode(), 1)); in AddCombineTo64bitUMAAL()
12877 DAG.ReplaceAllUsesOfValueWith(SDValue(AddcNode, 0), SDValue(UMAAL.getNode(), 0)); in AddCombineTo64bitUMAAL()
12892 SDNode* AddcNode = N->getOperand(2).getNode(); in PerformUMLALCombine()
12893 SDNode* AddeNode = N->getOperand(3).getNode(); in PerformUMLALCombine()
12898 (AddeNode->getOperand(2).getNode() == AddcNode)) in PerformUMLALCombine()
12899 return DAG.getNode(ARMISD::UMAAL, SDLoc(N), in PerformUMLALCombine()
12932 return DAG.getNode(Opcode, DL, N->getVTList(), N->getOperand(0), RHS); in PerformAddcSubcCombine()
12958 return DAG.getNode(Opcode, DL, N->getVTList(), in PerformAddeSubeCombine()
13060 LHS = DCI.DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, LHS); in PerformSELECTCombine()
13064 DCI.DAG.getNode(Opcode, dl, MVT::i32, LHS, RHS->getOperand(0)); in PerformSELECTCombine()
13068 Reduction = DCI.DAG.getNode(ISD::TRUNCATE, dl, VectorScalarType, Reduction); in PerformSELECTCombine()
13158 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
13160 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext1.getOperand(0)); in PerformVQDMULHCombine()
13161 Inp0 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp0); in PerformVQDMULHCombine()
13162 Inp1 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp1); in PerformVQDMULHCombine()
13163 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
13164 SDValue Trunc = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, ExtVecVT, VQDMULH); in PerformVQDMULHCombine()
13165 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
13166 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Trunc); in PerformVQDMULHCombine()
13175 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
13178 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext1.getOperand(0), in PerformVQDMULHCombine()
13180 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
13183 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, in PerformVQDMULHCombine()
13184 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
13223 return DCI.DAG.getNode(ISD::VSELECT, SDLoc(N), Type, Cond, RHS, LHS); in PerformVSELECTCombine()
13280 return DCI.DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in PerformVSetCCToVCTPCombine()
13332 if (N0.getNode()->hasOneUse()) in PerformADDCombineWithOperands()
13363 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0)); in TryDistrubutionADDVecReduce()
13364 return DAG.getNode(ISD::ADD, dl, VT, Add0, N1.getOperand(1)); in TryDistrubutionADDVecReduce()
13383 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0.getOperand(1 - N0RedOp), in TryDistrubutionADDVecReduce()
13386 DAG.getNode(ISD::ADD, dl, VT, Add0, N0.getOperand(N0RedOp)); in TryDistrubutionADDVecReduce()
13387 return DAG.getNode(ISD::ADD, dl, VT, Add1, N1.getOperand(N1RedOp)); in TryDistrubutionADDVecReduce()
13462 return DAG.getNode(ISD::ADD, dl, VT, N1, N0); in TryDistrubutionADDVecReduce()
13473 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, X, N1); in TryDistrubutionADDVecReduce()
13474 return DAG.getNode(ISD::ADD, dl, VT, Add0, N0); in TryDistrubutionADDVecReduce()
13514 NB->getOperand(1) != SDValue(VecRed.getNode(), 1)) in PerformADDVecReduce()
13519 SDValue Inp = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in PerformADDVecReduce()
13521 NA = DAG.getNode(ISD::ADD, dl, MVT::i64, Inp, NA); in PerformADDVecReduce()
13525 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13527 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13533 DAG.getNode(OpcodeA, dl, DAG.getVTList({MVT::i32, MVT::i32}), Ops); in PerformADDVecReduce()
13534 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Red, in PerformADDVecReduce()
13535 SDValue(Red.getNode(), 1)); in PerformADDVecReduce()
13774 SDValue BinOp = DAG.getNode(N->getOpcode(), dl, MVT::i32, X, in PerformSHLSimplify()
13777 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1)); in PerformSHLSimplify()
13822 return DAG.getNode(ARMISD::CSINV, SDLoc(N), MVT::i32, in PerformSubCSINCCombine()
13823 DAG.getNode(ISD::SUB, SDLoc(N), MVT::i32, N->getOperand(0), in PerformSubCSINCCombine()
13838 if (N1.getNode()->hasOneUse()) in PerformSUBCombine()
13863 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformSUBCombine()
13866 return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate); in PerformSUBCombine()
13910 return DAG.getNode(Opcode, DL, VT, in PerformVMULCombine()
13911 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
13912 DAG.getNode(ISD::MUL, DL, VT, N01, N1)); in PerformVMULCombine()
13964 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13965 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13966 return DAG.getNode(ARMISD::VMULLs, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
13971 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13972 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13973 return DAG.getNode(ARMISD::VMULLu, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
14017 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
14019 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14025 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14026 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14037 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14039 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14045 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
14047 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14051 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
14058 Res = DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
14085 SDNode *N0 = N->getOperand(0).getNode(); in CombineANDShift()
14120 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14122 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
14131 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14133 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
14144 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14146 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
14157 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
14159 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
14194 if (Val.getNode()) { in PerformANDCombine()
14196 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
14197 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
14198 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
14240 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) || in PerformORCombineToSMULWBT()
14244 SDNode *SMULLOHI = SRL.getOperand(0).getNode(); in PerformORCombineToSMULWBT()
14275 SDValue Res = DAG.getNode(Opcode, dl, MVT::i32, OpS32, OpS16); in PerformORCombineToSMULWBT()
14328 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombineToBFI()
14355 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0), in PerformORCombineToBFI()
14357 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombineToBFI()
14372 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombineToBFI()
14374 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res, in PerformORCombineToBFI()
14394 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0), in PerformORCombineToBFI()
14458 SDValue And = DAG.getNode(ISD::AND, DL, VT, NewN0, NewN1); in PerformORCombine_i1()
14490 if (Val.getNode()) { in PerformORCombine()
14492 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
14493 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
14494 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
14540 SDValue Result = DAG.getNode(ARMISD::VBSP, dl, CanonicalVT, in PerformORCombine()
14544 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
14597 return DAG.getNode(N0->getOpcode(), DL, N0->getValueType(0), Ops); in PerformXORCombine()
14648 SDValue NewFrom = ParseBFI(V.getNode(), NewToMask, NewFromMask); in FindBFIToCombineWith()
14687 return DAG.getNode(ARMISD::BFI, SDLoc(N), N->getValueType(0), in PerformBFICombine()
14699 SDValue From2 = ParseBFI(CombineBFI.getNode(), ToMask2, FromMask2); in PerformBFICombine()
14711 From1 = DAG.getNode( in PerformBFICombine()
14714 return DAG.getNode(ARMISD::BFI, dl, VT, CombineBFI.getOperand(0), From1, in PerformBFICombine()
14732 SDValue BFI1 = DAG.getNode(ARMISD::BFI, dl, VT, N0.getOperand(0), in PerformBFICombine()
14734 return DAG.getNode(ARMISD::BFI, dl, VT, BFI1, N0.getOperand(1), in PerformBFICombine()
14796 if (SDValue C = IsCMPZCSINC(N->getOperand(3).getNode(), Cond)) { in PerformCSETCombine()
14798 return DAG.getNode(N->getOpcode(), SDLoc(N), MVT::i32, N->getOperand(0), in PerformCSETCombine()
14802 return DAG.getNode( in PerformCSETCombine()
14821 SDNode *InNode = InDouble.getNode(); in PerformVMOVRRDCombine()
14836 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformVMOVRRDCombine()
14913 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
14915 return DAG.getNode(ISD::BITCAST, SDLoc(N), in PerformVMOVDRRCombine()
14940 DCI.DAG.getNode(ISD::CopyFromReg, SDLoc(N), N->getValueType(0), Ops); in PerformVMOVhrCombine()
14978 if (ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse()) { in PerformVMOVrhCombine()
14992 return DAG.getNode(ARMISD::VGETLANEu, SDLoc(N), VT, N0->getOperand(0), in PerformVMOVrhCombine()
15005 SDNode *Elt = N->getOperand(i).getNode(); in hasNormalLoadOperand()
15035 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
15038 DCI.AddToWorklist(V.getNode()); in PerformBUILD_VECTORCombine()
15042 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
15124 V = DAG.getNode(ISD::BITCAST, SDLoc(V), MVT::i32, V); in PerformARMBUILD_VECTORCombine()
15126 DCI.AddToWorklist(V.getNode()); in PerformARMBUILD_VECTORCombine()
15129 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
15131 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec); in PerformARMBUILD_VECTORCombine()
15133 DCI.AddToWorklist(Vec.getNode()); in PerformARMBUILD_VECTORCombine()
15148 return DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15155 DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15156 SDValue C = DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in PerformPREDICATE_CASTCombine()
15158 return DCI.DAG.getNode(ISD::XOR, dl, VT, X, C); in PerformPREDICATE_CASTCombine()
15179 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in PerformVECTOR_REG_CASTCombine()
15190 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Op->getOperand(0)); in PerformVECTOR_REG_CASTCombine()
15210 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op0, N->getOperand(2)); in PerformVCMPCombine()
15216 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op1, in PerformVCMPCombine()
15220 return DAG.getNode(ARMISD::VCMP, dl, VT, Op1, Op0, in PerformVCMPCombine()
15234 SDNode *Elt = N->getOperand(1).getNode(); in PerformInsertEltCombine()
15243 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
15244 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
15246 DCI.AddToWorklist(Vec.getNode()); in PerformInsertEltCombine()
15247 DCI.AddToWorklist(V.getNode()); in PerformInsertEltCombine()
15248 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
15250 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
15308 SDValue F64 = DCI.DAG.getNode( in PerformExtractEltToVMOVRRD()
15310 DCI.DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v2f64, Op0), in PerformExtractEltToVMOVRRD()
15313 DCI.DAG.getNode(ARMISD::VMOVRRD, dl, {MVT::i32, MVT::i32}, F64); in PerformExtractEltToVMOVRRD()
15315 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
15330 return DCI.DAG.getNode(ARMISD::VMOVhr, dl, VT, X); in PerformExtractEltCombine()
15332 return DCI.DAG.getNode(ARMISD::VMOVrh, dl, VT, X); in PerformExtractEltCombine()
15334 return DCI.DAG.getNode(ISD::BITCAST, dl, VT, X); in PerformExtractEltCombine()
15373 return DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Op0.getOperand(Vec), in PerformExtractEltCombine()
15388 return DAG.getNode(ARMISD::VGETLANEs, SDLoc(N), VT, Op.getOperand(0), in PerformSignExtendInregCombine()
15435 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), in FlattenVectorShuffle()
15470 Hi = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec, in PerformInsertSubvectorCombine()
15473 Lo = DCI.DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, Vec, in PerformInsertSubvectorCombine()
15477 return DCI.DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Lo, Hi); in PerformInsertSubvectorCombine()
15490 return DAG.getNode( in PerformShuffleVMOVNCombine()
15492 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
15493 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
15496 return DAG.getNode( in PerformShuffleVMOVNCombine()
15498 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
15499 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
15541 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, in PerformVECTOR_SHUFFLECombine()
15854 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in TryCombineBaseUpdate()
15864 NewResults.push_back(SDValue(UpdN.getNode(), i)); in TryCombineBaseUpdate()
15870 LdVal = DAG.getNode(ISD::BITCAST, dl, VecTy, LdVal); in TryCombineBaseUpdate()
15873 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); // chain in TryCombineBaseUpdate()
15875 DCI.CombineTo(User.N, SDValue(UpdN.getNode(), NumResultVecs)); in TryCombineBaseUpdate()
15884 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in getPointerConstIncrement()
15961 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in CombineBaseUpdate()
15962 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in CombineBaseUpdate()
15980 if (findPointerConstIncrement(Addr.getNode(), &Base, &CInc)) { in CombineBaseUpdate()
15987 if (UI.getUse().getResNo() != Base.getResNo() || User == Addr.getNode() || in CombineBaseUpdate()
16066 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in PerformMVEVLDCombine()
16067 UE = Addr.getNode()->use_end(); in PerformMVEVLDCombine()
16079 Visited.insert(Addr.getNode()); in PerformMVEVLDCombine()
16125 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in PerformMVEVLDCombine()
16155 NewResults.push_back(SDValue(UpdN.getNode(), i)); in PerformMVEVLDCombine()
16157 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); // chain in PerformMVEVLDCombine()
16159 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in PerformMVEVLDCombine()
16179 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP()
16234 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
16241 VLDDupResults.push_back(SDValue(VLDDup.getNode(), n)); in CombineVLDDUP()
16242 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs)); in CombineVLDDUP()
16262 SDValue Extract = DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), ExtractVT, in PerformVDUPLANECombine()
16264 return DCI.DAG.getNode(ARMISD::VDUP, SDLoc(N), VT, Extract); in PerformVDUPLANECombine()
16289 return DCI.DAG.getNode(ISD::BITCAST, SDLoc(N), VT, Op); in PerformVDUPLANECombine()
16302 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16303 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op)); in PerformVDUPCombine()
16305 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16306 DAG.getNode(ARMISD::VMOVrh, dl, MVT::i32, Op)); in PerformVDUPCombine()
16315 LoadSDNode *LD = dyn_cast<LoadSDNode>(Op.getNode()); in PerformVDUPCombine()
16378 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformTruncatingStoreCombine()
16408 SDValue ShuffWide = DAG.getNode(ISD::BITCAST, DL, StoreVecVT, Shuff); in PerformTruncatingStoreCombine()
16417 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, StoreType, in PerformTruncatingStoreCombine()
16423 DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr, Increment); in PerformTruncatingStoreCombine()
16426 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformTruncatingStoreCombine()
16506 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewFromVT, Trunc.getOperand(0), in PerformSplittingToNarrowingStores()
16510 DAG.getNode(ARMISD::VCVTN, DL, MVT::v8f16, DAG.getUNDEF(MVT::v8f16), in PerformSplittingToNarrowingStores()
16512 Extract = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v4i32, FPTrunc); in PerformSplittingToNarrowingStores()
16519 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingToNarrowingStores()
16560 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingMVETruncToNarrowingStores()
16629 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
16630 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
16636 St->getChain(), DL, StVal.getNode()->getOperand(isBigEndian ? 1 : 0), in PerformSTORECombine()
16640 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformSTORECombine()
16643 StVal.getNode()->getOperand(isBigEndian ? 0 : 1), in PerformSTORECombine()
16650 StVal.getNode()->getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in PerformSTORECombine()
16659 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
16660 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
16663 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
16665 DCI.AddToWorklist(Vec.getNode()); in PerformSTORECombine()
16666 DCI.AddToWorklist(ExtElt.getNode()); in PerformSTORECombine()
16667 DCI.AddToWorklist(V.getNode()); in PerformSTORECombine()
16727 SDValue FixConv = DAG.getNode( in PerformVCVTCombine()
16733 FixConv = DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), FixConv); in PerformVCVTCombine()
16777 DAG.getNode(ISD::FADD, DL, VT, Op0, Op1.getOperand(1), FaddFlags); in PerformFAddVSelectCombine()
16778 return DAG.getNode(ISD::VSELECT, DL, VT, Op1.getOperand(0), FAdd, Op0, FaddFlags); in PerformFAddVSelectCombine()
16796 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine()
16828 ConvInput = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PerformVDIVCombine()
16834 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, in PerformVDIVCombine()
16854 SDValue Red0 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(0)); in PerformVECREDUCE_ADDCombine()
16855 SDValue Red1 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(1)); in PerformVECREDUCE_ADDCombine()
16856 return DAG.getNode(ISD::ADD, dl, ResVT, Red0, Red1); in PerformVECREDUCE_ADDCombine()
16883 A = DAG.getNode(ExtendCode, dl, in PerformVECREDUCE_ADDCombine()
16900 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
16952 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
16988 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16991 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16994 SDValue MLA0 = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in PerformVECREDUCE_ADDCombine()
16997 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
17000 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, MLA1, MLA1.getValue(1)); in PerformVECREDUCE_ADDCombine()
17002 SDValue Node = DAG.getNode(Opcode, dl, {MVT::i32, MVT::i32}, Ops); in PerformVECREDUCE_ADDCombine()
17003 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Node, in PerformVECREDUCE_ADDCombine()
17004 SDValue(Node.getNode(), 1)); in PerformVECREDUCE_ADDCombine()
17010 return DAG.getNode(ARMISD::VMLAVs, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17012 return DAG.getNode(ARMISD::VMLAVu, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17020 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17021 DAG.getNode(ARMISD::VMLAVs, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17023 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17024 DAG.getNode(ARMISD::VMLAVu, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17028 return DAG.getNode(ARMISD::VMLAVps, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17031 return DAG.getNode(ARMISD::VMLAVpu, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17039 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17040 DAG.getNode(ARMISD::VMLAVps, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17042 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17043 DAG.getNode(ARMISD::VMLAVpu, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17046 return DAG.getNode(ARMISD::VADDVs, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17048 return DAG.getNode(ARMISD::VADDVu, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17054 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17055 DAG.getNode(ARMISD::VADDVs, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17057 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17058 DAG.getNode(ARMISD::VADDVu, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17061 return DAG.getNode(ARMISD::VADDVps, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17063 return DAG.getNode(ARMISD::VADDVpu, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17069 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17070 DAG.getNode(ARMISD::VADDVps, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17072 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17073 DAG.getNode(ARMISD::VADDVpu, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17086 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, dl, N0->getValueType(0), Mul); in PerformVECREDUCE_ADDCombine()
17088 Ext = DAG.getNode(ISD::VSELECT, dl, N0->getValueType(0), in PerformVECREDUCE_ADDCombine()
17090 return DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, Ext); in PerformVECREDUCE_ADDCombine()
17116 return DCI.DAG.getNode(Op1->getOpcode(), SDLoc(Op1), N->getValueType(0), in PerformVMOVNCombine()
17164 DAG.ReplaceAllUsesWith(N, Merge.getNode()); in PerformLongShiftCombine()
17171 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, in PerformLongShiftCombine()
17173 DAG.ReplaceAllUsesWith(N, NewShift.getNode()); in PerformLongShiftCombine()
17306 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17324 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17377 return DAG.getNode(Opc, SDLoc(N), N->getVTList(), N->getOperand(1)); in PerformIntrinsicCombine()
17395 SDValue val = DAG.getNode(Opc, dl, {MVT::i32, MVT::i32}, Ops); in PerformIntrinsicCombine()
17396 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, val.getValue(0), in PerformIntrinsicCombine()
17440 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in PerformShiftCombine()
17442 return DAG.getNode( in PerformShiftCombine()
17464 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in PerformShiftCombine()
17475 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in PerformShiftCombine()
17490 LoadSDNode *LD = cast<LoadSDNode>(N0.getNode()); in PerformSplittingToWideningLoad()
17542 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingToWideningLoad()
17551 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v8f16, Loads[i]); in PerformSplittingToWideningLoad()
17552 SDValue FPExt = DAG.getNode(ARMISD::VCVTL, DL, MVT::v4f32, LoadBC, in PerformSplittingToWideningLoad()
17560 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingToWideningLoad()
17562 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Loads); in PerformSplittingToWideningLoad()
17599 return DAG.getNode(Opc, SDLoc(N), VT, Vec, Lane); in PerformExtendCombine()
17651 return DAG.getNode(ARMISD::SSAT, DL, VT, Input, in PerformMinMaxToSatCombine()
17654 return DAG.getNode(ARMISD::USAT, DL, VT, Input, in PerformMinMaxToSatCombine()
17693 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
17696 if (!ISD::isConstantSplatVector(Max->getOperand(1).getNode(), MaxC) || in PerformMinMaxCombine()
17702 if (IsSignedSaturate(N, N0.getNode())) { in PerformMinMaxCombine()
17717 DAG.getNode(ARMISD::VQMOVNs, DL, HalfVT, DAG.getUNDEF(HalfVT), in PerformMinMaxCombine()
17719 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
17720 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Bitcast, in PerformMinMaxCombine()
17736 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
17758 DAG.getNode(ARMISD::VQMOVNu, DL, HalfVT, DAG.getUNDEF(HalfVT), N0, in PerformMinMaxCombine()
17760 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
17761 return DAG.getNode(ISD::AND, DL, VT, Bitcast, in PerformMinMaxCombine()
17848 X = DAG.getNode(ISD::SRL, dl, VT, X, in PerformCMOVToBFICombine()
17858 V = DAG.getNode(ARMISD::BFI, dl, VT, V, X, in PerformCMOVToBFICombine()
17986 SDValue NewBr = DAG.getNode(ISD::BR, SDLoc(Br), MVT::Other, NewBrOps); in PerformHWLoopCombine()
17992 SDValue Setup = DAG.getNode(ARMISD::WLSSETUP, dl, MVT::i32, Elements); in PerformHWLoopCombine()
17996 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18003 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18014 SDValue LoopDec = DAG.getNode(ARMISD::LOOP_DEC, dl, in PerformHWLoopCombine()
18016 DAG.ReplaceAllUsesWith(Int.getNode(), LoopDec.getNode()); in PerformHWLoopCombine()
18026 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in PerformHWLoopCombine()
18027 SDValue(LoopDec.getNode(), 1), Chain); in PerformHWLoopCombine()
18029 SDValue EndArgs[] = { Chain, SDValue(LoopDec.getNode(), 0), Target }; in PerformHWLoopCombine()
18030 return DAG.getNode(ARMISD::LE, dl, MVT::Other, EndArgs); in PerformHWLoopCombine()
18066 return DAG.getNode( in PerformBRCONDCombine()
18119 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
18124 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
18137 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in PerformCMOVCombine()
18153 if (SDValue C = IsCMPZCSINC(N->getOperand(4).getNode(), Cond)) { in PerformCMOVCombine()
18156 return DAG.getNode(N->getOpcode(), SDLoc(N), MVT::i32, N->getOperand(0), in PerformCMOVCombine()
18170 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18171 Res = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::CTLZ, dl, VT, Sub), in PerformCMOVCombine()
18183 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18185 SDValue Neg = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, Sub); in PerformCMOVCombine()
18189 DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformCMOVCombine()
18191 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
18198 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18201 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, TrueVal, ARMcc, in PerformCMOVCombine()
18212 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18215 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, FalseVal, in PerformCMOVCombine()
18245 SDValue Subc = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, TrueVal); in PerformCMOVCombine()
18246 Res = DAG.getNode(ISD::SUBCARRY, dl, VTs, FalseVal, Subc, Subc.getValue(1)); in PerformCMOVCombine()
18249 Res = DAG.getNode(ISD::SHL, dl, VT, Res, in PerformCMOVCombine()
18253 if (Res.getNode()) { in PerformCMOVCombine()
18257 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18260 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18263 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18281 return DAG.getNode(ARMISD::VDUP, SDLoc(N), DstVT, Src.getOperand(0)); in PerformBITCASTCombine()
18297 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(N), DstVT, Src); in PerformBITCASTCombine()
18322 return DAG.getNode(ARMISD::MVETRUNC, DL, VT, N->getOperand(0).getOperand(0), in PerformMVETruncCombine()
18331 auto *S0 = cast<ShuffleVectorSDNode>(N->getOperand(0).getNode()); in PerformMVETruncCombine()
18332 auto *S1 = cast<ShuffleVectorSDNode>(N->getOperand(1).getNode()); in PerformMVETruncCombine()
18341 return DAG.getNode( in PerformMVETruncCombine()
18343 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
18344 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
18347 return DAG.getNode( in PerformMVETruncCombine()
18349 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
18350 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
18367 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, O, in PerformMVETruncCombine()
18383 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVETruncCombine()
18393 SDValue Ptr = DAG.getNode( in PerformMVETruncCombine()
18403 SDValue Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformMVETruncCombine()
18413 LoadSDNode *LD = dyn_cast<LoadSDNode>(N0.getNode()); in PerformSplittingMVEEXTToWideningLoad()
18466 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingMVEEXTToWideningLoad()
18469 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingMVEEXTToWideningLoad()
18488 SDValue VVT = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, V); in PerformMVEExtCombine()
18490 ? DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, VVT, in PerformMVEExtCombine()
18521 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
18525 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
18530 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
18534 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
18536 if (V0.getNode() != N || V1.getNode() != N) in PerformMVEExtCombine()
18551 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVEExtCombine()
18567 SDValue Ptr = DAG.getNode( in PerformMVEExtCombine()
19126 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable()
19665 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
19669 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
19672 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
19842 ConstantSDNode *Pos = cast<ConstantSDNode>(Op.getOperand(1).getNode()); in computeKnownBitsForTargetNode()
19944 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC); in targetShrinkDemandedConstant()
19994 Op, TLO.DAG.getNode( in SimplifyDemandedBitsForTargetNode()
20368 if (Result.getNode()) { in LowerAsmOperandForConstraint()
20441 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
20442 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Div, Divisor); in LowerDivRem()
20443 SDValue Rem = DAG.getNode(ISD::SUB, dl, VT, Dividend, Mul); in LowerDivRem()
20446 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values); in LowerDivRem()
20449 RTLIB::Libcall LC = getDivRemLibcall(Op.getNode(), in LowerDivRem()
20453 TargetLowering::ArgListTy Args = getDivRemArgList(Op.getNode(), in LowerDivRem()
20463 InChain = WinDBZCheckDenominator(DAG, Op.getNode(), InChain); in LowerDivRem()
20514 SDNode *ResNode = CallResult.first.getNode(); in LowerREM()
20534 SP = DAG.getNode(ISD::SUB, DL, MVT::i32, SP, Size); in LowerDYNAMIC_STACKALLOC()
20537 DAG.getNode(ISD::AND, DL, MVT::i32, SP.getValue(0), in LowerDYNAMIC_STACKALLOC()
20544 SDValue Words = DAG.getNode(ISD::SRL, DL, MVT::i32, Size, in LowerDYNAMIC_STACKALLOC()
20552 Chain = DAG.getNode(ARMISD::WIN__CHKSTK, DL, NodeTys, Chain, Flag); in LowerDYNAMIC_STACKALLOC()
20580 SDValue Result = DAG.getNode(ISD::FP_EXTEND, in LowerFP_EXTEND()
20602 SrcVal = DAG.getNode(ISD::STRICT_FP_EXTEND, Loc, in LowerFP_EXTEND()
20606 SrcVal = DAG.getNode(ISD::FP_EXTEND, Loc, DstVT, SrcVal); in LowerFP_EXTEND()