Lines Matching refs:VecVT

6179   EVT VecVT = EVT::getVectorVT(  in CombineVMOVDRRCandidateWithVecOp()  local
6182 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
7974 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR() local
7975 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
8032 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR() local
8036 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8858 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE() local
8859 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8860 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
8871 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
8892 EVT VecVT = Op.getOperand(0).getValueType(); in LowerINSERT_VECTOR_ELT_i1() local
8902 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerINSERT_VECTOR_ELT_i1()
8939 EVT VecVT = VecIn.getValueType(); in LowerINSERT_VECTOR_ELT() local
8941 VecVT.getVectorNumElements()); in LowerINSERT_VECTOR_ELT()
8947 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
8955 EVT VecVT = Op.getOperand(0).getValueType(); in LowerEXTRACT_VECTOR_ELT_i1() local
8965 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerEXTRACT_VECTOR_ELT_i1()
13140 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine() local
13141 if (!VecVT.isPow2VectorType() || VecVT.getVectorNumElements() == 1) in PerformVQDMULHCombine()
13143 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
13144 VecVT.getScalarType() != ScalarType || in PerformVQDMULHCombine()
13153 if (VecVT.getSizeInBits() < 128) { in PerformVQDMULHCombine()
13155 MVT::getVectorVT(MVT::getIntegerVT(128 / VecVT.getVectorNumElements()), in PerformVQDMULHCombine()
13156 VecVT.getVectorNumElements()); in PerformVQDMULHCombine()
13165 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
13170 assert(VecVT.getSizeInBits() % 128 == 0 && "Expected a power2 type"); in PerformVQDMULHCombine()
13171 unsigned NumParts = VecVT.getSizeInBits() / 128; in PerformVQDMULHCombine()
13184 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
15102 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); in PerformARMBUILD_VECTORCombine() local
15105 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine()
15113 SDValue Vec = DAG.getUNDEF(VecVT); in PerformARMBUILD_VECTORCombine()
15129 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
15280 EVT VecVT = Op0.getValueType(); in PerformExtractEltToVMOVRRD() local
15283 if (VecVT.getVectorNumElements() != 4) in PerformExtractEltToVMOVRRD()
15444 EVT VecVT = Vec.getValueType(); in PerformInsertSubvectorCombine() local
15448 if (!VecVT.isFixedLengthVector() || in PerformInsertSubvectorCombine()
15449 !DCI.DAG.getTargetLoweringInfo().isTypeLegal(VecVT) || in PerformInsertSubvectorCombine()
15459 if ((SubVT.getSizeInBits() * 2) != VecVT.getSizeInBits() || in PerformInsertSubvectorCombine()
15477 return DCI.DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Lo, Hi); in PerformInsertSubvectorCombine()
19839 EVT VecVT = SrcSV.getValueType(); in computeKnownBitsForTargetNode() local
19840 assert(VecVT.isVector() && "VGETLANE expected a vector type"); in computeKnownBitsForTargetNode()
19841 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in computeKnownBitsForTargetNode()
19851 const unsigned SrcSz = VecVT.getVectorElementType().getSizeInBits(); in computeKnownBitsForTargetNode()