1759     MAKE_CASE(ARMISD::VDUP)  in getTargetNodeName()
7820       SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const);  in LowerBUILD_VECTOR()
7864         SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const);  in LowerBUILD_VECTOR()
7949         N = DAG.getNode(ARMISD::VDUP, dl, VT, Value);  in LowerBUILD_VECTOR()
7983         return DAG.getNode(ARMISD::VDUP, dl, VT, Val);  in LowerBUILD_VECTOR()
8709         return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));  in LowerVECTOR_SHUFFLE()
8723           return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));  in LowerVECTOR_SHUFFLE()
13852   if (VDup->getOpcode() != ARMISD::VDUP)  in PerformSUBCombine()
13866   return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate);  in PerformSUBCombine()
15219     if (Op0->getOpcode() == ARMISD::VDUP && Op1->getOpcode() != ARMISD::VDUP)  in PerformVCMPCombine()
15327   if (Op0->getOpcode() == ARMISD::VDUP) {  in PerformExtractEltCombine()
16264     return DCI.DAG.getNode(ARMISD::VDUP, SDLoc(N), VT, Extract);  in PerformVDUPLANECombine()
16302       return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0),  in PerformVDUPCombine()
16305       return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0),  in PerformVDUPCombine()
18278   if (ST->hasMVEIntegerOps() && Src.getOpcode() == ARMISD::VDUP) {  in PerformBITCASTCombine()
18281       return DAG.getNode(ARMISD::VDUP, SDLoc(N), DstVT, Src.getOperand(0));  in PerformBITCASTCombine()
18496   if (N->getOperand(0).getOpcode() == ARMISD::VDUP) {  in PerformMVEExtCombine()
18617   case ARMISD::VDUP: return PerformVDUPCombine(N, DCI.DAG, Subtarget);  in PerformDAGCombine()