Lines Matching refs:SINT_TO_FP

173     setOperationAction(ISD::SINT_TO_FP, VT, Custom);  in addTypeForNEON()
178 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addTypeForNEON()
304 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addMVEVectorTypes()
456 setOperationAction(ISD::SINT_TO_FP, VT, Expand); in addMVEVectorTypes()
467 setOperationAction(ISD::SINT_TO_FP, MVT::v2i1, Expand); in addMVEVectorTypes()
940 setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
941 setOperationAction(ISD::SINT_TO_FP, MVT::v8i16, Custom); in ARMTargetLowering()
1057 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
5946 case ISD::SINT_TO_FP: in LowerVectorINT_TO_FP()
5948 Opc = ISD::SINT_TO_FP; in LowerVectorINT_TO_FP()
5966 if (Op.getOpcode() == ISD::SINT_TO_FP) in LowerINT_TO_FP()
9551 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9552 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9583 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9584 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9691 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9692 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
10354 case ISD::SINT_TO_FP: in LowerOperation()
15275 (Ext->use_begin()->getOpcode() == ISD::SINT_TO_FP || in PerformExtractEltToVMOVRRD()
16798 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
16825 bool isSigned = OpOpcode == ISD::SINT_TO_FP; in PerformVDIVCombine()