Lines Matching refs:Reg0
2160 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
2182 Ops.push_back(Reg0); in SelectVLD()
2185 Ops.push_back(Reg0); in SelectVLD()
2198 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
2211 Ops.push_back(Reg0); in SelectVLD()
2215 Ops.push_back(Reg0); in SelectVLD()
2295 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2342 Ops.push_back(Reg0); in SelectVST()
2346 Ops.push_back(Reg0); in SelectVST()
2371 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2386 Ops.push_back(Reg0); in SelectVST()
2390 Ops.push_back(Reg0); in SelectVST()
2468 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2477 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2501 Ops.push_back(Reg0); in SelectVLDSTLane()
3009 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
3023 Ops.push_back(Reg0); in SelectVLDDup()
3033 const SDValue OpsA[] = {MemAddr, Align, Pred, Reg0, Chain}; in SelectVLDDup()
3040 const SDValue OpsA[] = {MemAddr, Align, ImplDef, Pred, Reg0, Chain}; in SelectVLDDup()
3048 Ops.push_back(Reg0); in SelectVLDDup()
3363 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3371 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3382 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3391 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3411 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3416 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3433 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3438 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3454 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3459 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3789 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3791 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3795 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3796 Reg0 }; in Select()
3808 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3810 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3814 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3815 Reg0 }; in Select()
5210 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5211 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select()
5221 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5222 SDValue Ops[] = { Src, Pred, Reg0 }; in Select()
5802 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
5825 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
5840 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()