2122   unsigned OpcodeIndex;  in SelectVLD()  local
2126   case MVT::v8i8:  OpcodeIndex = 0; break;  in SelectVLD()
2129   case MVT::v4i16: OpcodeIndex = 1; break;  in SelectVLD()
2131   case MVT::v2i32: OpcodeIndex = 2; break;  in SelectVLD()
2132   case MVT::v1i64: OpcodeIndex = 3; break;  in SelectVLD()
2134   case MVT::v16i8: OpcodeIndex = 0; break;  in SelectVLD()
2137   case MVT::v8i16: OpcodeIndex = 1; break;  in SelectVLD()
2139   case MVT::v4i32: OpcodeIndex = 2; break;  in SelectVLD()
2141   case MVT::v2i64: OpcodeIndex = 3; break;  in SelectVLD()
2166     unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :  in SelectVLD()
2167                     QOpcodes0[OpcodeIndex]);  in SelectVLD()
2199     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,  in SelectVLD()
2217     VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops);  in SelectVLD()
2267   unsigned OpcodeIndex;  in SelectVST()  local
2271   case MVT::v8i8:  OpcodeIndex = 0; break;  in SelectVST()
2274   case MVT::v4i16: OpcodeIndex = 1; break;  in SelectVST()
2276   case MVT::v2i32: OpcodeIndex = 2; break;  in SelectVST()
2277   case MVT::v1i64: OpcodeIndex = 3; break;  in SelectVST()
2279   case MVT::v16i8: OpcodeIndex = 0; break;  in SelectVST()
2282   case MVT::v8i16: OpcodeIndex = 1; break;  in SelectVST()
2284   case MVT::v4i32: OpcodeIndex = 2; break;  in SelectVST()
2286   case MVT::v2i64: OpcodeIndex = 3; break;  in SelectVST()
2325     unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :  in SelectVST()
2326                     QOpcodes0[OpcodeIndex]);  in SelectVST()
2372   SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl,  in SelectVST()
2392   SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys,  in SelectVST()
2437   unsigned OpcodeIndex;  in SelectVLDSTLane()  local
2441   case MVT::v8i8:  OpcodeIndex = 0; break;  in SelectVLDSTLane()
2444   case MVT::v4i16: OpcodeIndex = 1; break;  in SelectVLDSTLane()
2446   case MVT::v2i32: OpcodeIndex = 2; break;  in SelectVLDSTLane()
2450   case MVT::v8i16: OpcodeIndex = 0; break;  in SelectVLDSTLane()
2452   case MVT::v4i32: OpcodeIndex = 1; break;  in SelectVLDSTLane()
2504   unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :  in SelectVLDSTLane()
2505                                   QOpcodes[OpcodeIndex]);  in SelectVLDSTLane()
2977   unsigned OpcodeIndex;  in SelectVLDDup()  local
2981   case MVT::v16i8: OpcodeIndex = 0; break;  in SelectVLDDup()
2988                   OpcodeIndex = 1; break;  in SelectVLDDup()
2992   case MVT::v4i32: OpcodeIndex = 2; break;  in SelectVLDDup()
2994   case MVT::v1i64: OpcodeIndex = 3; break;  in SelectVLDDup()
3014   unsigned Opc = is64BitVector    ? DOpcodes[OpcodeIndex]  in SelectVLDDup()
3015                  : (NumVecs == 1) ? QOpcodes0[OpcodeIndex]  in SelectVLDDup()
3016                                   : QOpcodes1[OpcodeIndex];  in SelectVLDDup()
3034     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, ResTy,  in SelectVLDDup()
3041     SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, ResTy,  in SelectVLDDup()