129   return Opc == ARM::AESD || Opc == ARM::AESE;  in isFirstAESPairInstr()
145   case ARM::AESD:  in isSafeAESInput()
146   case ARM::AESE:  in isSafeAESInput()
147   case ARM::AESMC:  in isSafeAESInput()
148   case ARM::AESIMC:  in isSafeAESInput()
152   case ARM::VANDd:  in isSafeAESInput()
153   case ARM::VANDq:  in isSafeAESInput()
154   case ARM::VORRd:  in isSafeAESInput()
155   case ARM::VORRq:  in isSafeAESInput()
156   case ARM::VEORd:  in isSafeAESInput()
157   case ARM::VEORq:  in isSafeAESInput()
158   case ARM::VMVNd:  in isSafeAESInput()
159   case ARM::VMVNq:  in isSafeAESInput()
161   case ARM::VMOVD:  in isSafeAESInput()
163   case ARM::VMOVDRR:  in isSafeAESInput()
165   case ARM::VMOVv2i64:  in isSafeAESInput()
166   case ARM::VMOVv1i64:  in isSafeAESInput()
167   case ARM::VMOVv2f32:  in isSafeAESInput()
168   case ARM::VMOVv4f32:  in isSafeAESInput()
169   case ARM::VMOVv2i32:  in isSafeAESInput()
170   case ARM::VMOVv4i32:  in isSafeAESInput()
171   case ARM::VMOVv4i16:  in isSafeAESInput()
172   case ARM::VMOVv8i16:  in isSafeAESInput()
173   case ARM::VMOVv8i8:  in isSafeAESInput()
174   case ARM::VMOVv16i8:  in isSafeAESInput()
177   case ARM::VLDRD:  in isSafeAESInput()
179   case ARM::VLDMDDB_UPD:  in isSafeAESInput()
180   case ARM::VLDMDIA_UPD:  in isSafeAESInput()
181   case ARM::VLDMDIA:  in isSafeAESInput()
183   case ARM::VLD1d64:  in isSafeAESInput()
184   case ARM::VLD1q64:  in isSafeAESInput()
185   case ARM::VLD1d32:  in isSafeAESInput()
186   case ARM::VLD1q32:  in isSafeAESInput()
187   case ARM::VLD2b32:  in isSafeAESInput()
188   case ARM::VLD2d32:  in isSafeAESInput()
189   case ARM::VLD2q32:  in isSafeAESInput()
190   case ARM::VLD1d16:  in isSafeAESInput()
191   case ARM::VLD1q16:  in isSafeAESInput()
192   case ARM::VLD2d16:  in isSafeAESInput()
193   case ARM::VLD2q16:  in isSafeAESInput()
194   case ARM::VLD1d8:  in isSafeAESInput()
195   case ARM::VLD1q8:  in isSafeAESInput()
196   case ARM::VLD2b8:  in isSafeAESInput()
197   case ARM::VLD2d8:  in isSafeAESInput()
198   case ARM::VLD2q8:  in isSafeAESInput()
199   case ARM::VLD3d32:  in isSafeAESInput()
200   case ARM::VLD3q32:  in isSafeAESInput()
201   case ARM::VLD3d16:  in isSafeAESInput()
202   case ARM::VLD3q16:  in isSafeAESInput()
203   case ARM::VLD3d8:  in isSafeAESInput()
204   case ARM::VLD3q8:  in isSafeAESInput()
205   case ARM::VLD4d32:  in isSafeAESInput()
206   case ARM::VLD4q32:  in isSafeAESInput()
207   case ARM::VLD4d16:  in isSafeAESInput()
208   case ARM::VLD4q16:  in isSafeAESInput()
209   case ARM::VLD4d8:  in isSafeAESInput()
210   case ARM::VLD4q8:  in isSafeAESInput()
212   case ARM::VLD1LNd32:  in isSafeAESInput()
213   case ARM::VLD1LNd32_UPD:  in isSafeAESInput()
214   case ARM::VLD1LNd8:  in isSafeAESInput()
215   case ARM::VLD1LNd8_UPD:  in isSafeAESInput()
216   case ARM::VLD1LNd16:  in isSafeAESInput()
217   case ARM::VLD1LNd16_UPD:  in isSafeAESInput()
219   case ARM::VLD1DUPd32:  in isSafeAESInput()
220   case ARM::VLD1DUPd32wb_fixed:  in isSafeAESInput()
221   case ARM::VLD1DUPd32wb_register:  in isSafeAESInput()
222   case ARM::VLD1DUPd16:  in isSafeAESInput()
223   case ARM::VLD1DUPd16wb_fixed:  in isSafeAESInput()
224   case ARM::VLD1DUPd16wb_register:  in isSafeAESInput()
225   case ARM::VLD1DUPd8:  in isSafeAESInput()
226   case ARM::VLD1DUPd8wb_fixed:  in isSafeAESInput()
227   case ARM::VLD1DUPd8wb_register:  in isSafeAESInput()
228   case ARM::VLD1DUPq32:  in isSafeAESInput()
229   case ARM::VLD1DUPq32wb_fixed:  in isSafeAESInput()
230   case ARM::VLD1DUPq32wb_register:  in isSafeAESInput()
231   case ARM::VLD1DUPq16:  in isSafeAESInput()
232   case ARM::VLD1DUPq16wb_fixed:  in isSafeAESInput()
233   case ARM::VLD1DUPq16wb_register:  in isSafeAESInput()
234   case ARM::VLD1DUPq8:  in isSafeAESInput()
235   case ARM::VLD1DUPq8wb_fixed:  in isSafeAESInput()
236   case ARM::VLD1DUPq8wb_register:  in isSafeAESInput()
238   case ARM::VSETLNi32:  in isSafeAESInput()
239   case ARM::VSETLNi16:  in isSafeAESInput()
240   case ARM::VSETLNi8:  in isSafeAESInput()
420           TII->get(ARM::VORRq))  in insertAESFixup()
425       .addReg(ARM::NoRegister);  in insertAESFixup()