200     unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1737   EVT DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectBinaryIntOp()  local
1741   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)  in SelectBinaryIntOp()
1953         MVT DestVT = VA.getLocVT();  in ProcessCallArgs()  local
1954         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);  in ProcessCallArgs()
1956         ArgVT = DestVT;  in ProcessCallArgs()
1962         MVT DestVT = VA.getLocVT();  in ProcessCallArgs()  local
1963         Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);  in ProcessCallArgs()
1965         ArgVT = DestVT;  in ProcessCallArgs()
2040       MVT DestVT = RVLocs[0].getValVT();  in FinishCall()  local
2041       const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);  in FinishCall()
2128     MVT DestVT = VA.getValVT();  in SelectRet()  local
2130     if (RVVT != DestVT) {  in SelectRet()
2134       assert(DestVT == MVT::i32 && "ARM should always ext to i32");  in SelectRet()
2139         SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());  in SelectRet()
2585   EVT SrcVT, DestVT;  in SelectTrunc()  local
2587   DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectTrunc()
2591   if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)  in SelectTrunc()
2603 unsigned ARMFastISel::ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,  in ARMEmitIntExt()  argument
2605   if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)  in ARMEmitIntExt()
2677   unsigned DestBits = DestVT.getSizeInBits();  in ARMEmitIntExt()
2760   MVT DestVT = DestEVT.getSimpleVT();  in SelectIntExt()  local
2761   unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);  in SelectIntExt()
2775   EVT DestVT = TLI.getValueType(DL, I->getType(), true);  in SelectShift()  local
2776   if (DestVT != MVT::i32)  in SelectShift()