369     return MI->getOpcode() == ARM::t2LoopEndDec ||  in isUnspillableTerminatorImpl()
370            MI->getOpcode() == ARM::t2DoLoopStartTP ||  in isUnspillableTerminatorImpl()
371            MI->getOpcode() == ARM::t2WhileLoopStartLR ||  in isUnspillableTerminatorImpl()
372            MI->getOpcode() == ARM::t2WhileLoopStartTP;  in isUnspillableTerminatorImpl()
557   return MachineOperand::CreateReg(ARM::CPSR,
564   return Opc == ARM::B || Opc == ARM::tB || Opc == ARM::t2B;  in isUncondBranchOpcode()
571   return Opc == ARM::MVE_VPTv16i8 || Opc == ARM::MVE_VPTv16u8 ||  in isVPTOpcode()
572          Opc == ARM::MVE_VPTv16s8 || Opc == ARM::MVE_VPTv8i16 ||  in isVPTOpcode()
573          Opc == ARM::MVE_VPTv8u16 || Opc == ARM::MVE_VPTv8s16 ||  in isVPTOpcode()
574          Opc == ARM::MVE_VPTv4i32 || Opc == ARM::MVE_VPTv4u32 ||  in isVPTOpcode()
575          Opc == ARM::MVE_VPTv4s32 || Opc == ARM::MVE_VPTv4f32 ||  in isVPTOpcode()
576          Opc == ARM::MVE_VPTv8f16 || Opc == ARM::MVE_VPTv16i8r ||  in isVPTOpcode()
577          Opc == ARM::MVE_VPTv16u8r || Opc == ARM::MVE_VPTv16s8r ||  in isVPTOpcode()
578          Opc == ARM::MVE_VPTv8i16r || Opc == ARM::MVE_VPTv8u16r ||  in isVPTOpcode()
579          Opc == ARM::MVE_VPTv8s16r || Opc == ARM::MVE_VPTv4i32r ||  in isVPTOpcode()
580          Opc == ARM::MVE_VPTv4u32r || Opc == ARM::MVE_VPTv4s32r ||  in isVPTOpcode()
581          Opc == ARM::MVE_VPTv4f32r || Opc == ARM::MVE_VPTv8f16r ||  in isVPTOpcode()
582          Opc == ARM::MVE_VPST;  in isVPTOpcode()
590   case ARM::MVE_VCMPf32:  in VCMPOpcodeToVPT()
591     return ARM::MVE_VPTv4f32;  in VCMPOpcodeToVPT()
592   case ARM::MVE_VCMPf16:  in VCMPOpcodeToVPT()
593     return ARM::MVE_VPTv8f16;  in VCMPOpcodeToVPT()
594   case ARM::MVE_VCMPi8:  in VCMPOpcodeToVPT()
595     return ARM::MVE_VPTv16i8;  in VCMPOpcodeToVPT()
596   case ARM::MVE_VCMPi16:  in VCMPOpcodeToVPT()
597     return ARM::MVE_VPTv8i16;  in VCMPOpcodeToVPT()
598   case ARM::MVE_VCMPi32:  in VCMPOpcodeToVPT()
599     return ARM::MVE_VPTv4i32;  in VCMPOpcodeToVPT()
600   case ARM::MVE_VCMPu8:  in VCMPOpcodeToVPT()
601     return ARM::MVE_VPTv16u8;  in VCMPOpcodeToVPT()
602   case ARM::MVE_VCMPu16:  in VCMPOpcodeToVPT()
603     return ARM::MVE_VPTv8u16;  in VCMPOpcodeToVPT()
604   case ARM::MVE_VCMPu32:  in VCMPOpcodeToVPT()
605     return ARM::MVE_VPTv4u32;  in VCMPOpcodeToVPT()
606   case ARM::MVE_VCMPs8:  in VCMPOpcodeToVPT()
607     return ARM::MVE_VPTv16s8;  in VCMPOpcodeToVPT()
608   case ARM::MVE_VCMPs16:  in VCMPOpcodeToVPT()
609     return ARM::MVE_VPTv8s16;  in VCMPOpcodeToVPT()
610   case ARM::MVE_VCMPs32:  in VCMPOpcodeToVPT()
611     return ARM::MVE_VPTv4s32;  in VCMPOpcodeToVPT()
613   case ARM::MVE_VCMPf32r:  in VCMPOpcodeToVPT()
614     return ARM::MVE_VPTv4f32r;  in VCMPOpcodeToVPT()
615   case ARM::MVE_VCMPf16r:  in VCMPOpcodeToVPT()
616     return ARM::MVE_VPTv8f16r;  in VCMPOpcodeToVPT()
617   case ARM::MVE_VCMPi8r:  in VCMPOpcodeToVPT()
618     return ARM::MVE_VPTv16i8r;  in VCMPOpcodeToVPT()
619   case ARM::MVE_VCMPi16r:  in VCMPOpcodeToVPT()
620     return ARM::MVE_VPTv8i16r;  in VCMPOpcodeToVPT()
621   case ARM::MVE_VCMPi32r:  in VCMPOpcodeToVPT()
622     return ARM::MVE_VPTv4i32r;  in VCMPOpcodeToVPT()
623   case ARM::MVE_VCMPu8r:  in VCMPOpcodeToVPT()
624     return ARM::MVE_VPTv16u8r;  in VCMPOpcodeToVPT()
625   case ARM::MVE_VCMPu16r:  in VCMPOpcodeToVPT()
626     return ARM::MVE_VPTv8u16r;  in VCMPOpcodeToVPT()
627   case ARM::MVE_VCMPu32r:  in VCMPOpcodeToVPT()
628     return ARM::MVE_VPTv4u32r;  in VCMPOpcodeToVPT()
629   case ARM::MVE_VCMPs8r:  in VCMPOpcodeToVPT()
630     return ARM::MVE_VPTv16s8r;  in VCMPOpcodeToVPT()
631   case ARM::MVE_VCMPs16r:  in VCMPOpcodeToVPT()
632     return ARM::MVE_VPTv8s16r;  in VCMPOpcodeToVPT()
633   case ARM::MVE_VCMPs32r:  in VCMPOpcodeToVPT()
634     return ARM::MVE_VPTv4s32r;  in VCMPOpcodeToVPT()
640   return Opc == ARM::Bcc || Opc == ARM::tBcc || Opc == ARM::t2Bcc;  in isCondBranchOpcode()
644   return Opc == ARM::BR_JTr || Opc == ARM::BR_JTm_i12 ||  in isJumpTableBranchOpcode()
645          Opc == ARM::BR_JTm_rs || Opc == ARM::BR_JTadd || Opc == ARM::tBR_JTr ||  in isJumpTableBranchOpcode()
646          Opc == ARM::t2BR_JT;  in isJumpTableBranchOpcode()
651   return Opc == ARM::BX || Opc == ARM::MOVPCRX || Opc == ARM::tBRIND;  in isIndirectBranchOpcode()
658   case ARM::BLX:  in isIndirectCall()
659   case ARM::BLX_noip:  in isIndirectCall()
660   case ARM::BLX_pred:  in isIndirectCall()
661   case ARM::BLX_pred_noip:  in isIndirectCall()
662   case ARM::BX_CALL:  in isIndirectCall()
663   case ARM::BMOVPCRX_CALL:  in isIndirectCall()
664   case ARM::TCRETURNri:  in isIndirectCall()
665   case ARM::TAILJMPr:  in isIndirectCall()
666   case ARM::TAILJMPr4:  in isIndirectCall()
667   case ARM::tBLXr:  in isIndirectCall()
668   case ARM::tBLXr_noip:  in isIndirectCall()
669   case ARM::tBLXNSr:  in isIndirectCall()
670   case ARM::tBLXNS_CALL:  in isIndirectCall()
671   case ARM::tBX_CALL:  in isIndirectCall()
672   case ARM::tTAILJMPr:  in isIndirectCall()
676   case ARM::BL:  in isIndirectCall()
677   case ARM::BL_pred:  in isIndirectCall()
678   case ARM::BMOVPCB_CALL:  in isIndirectCall()
679   case ARM::BL_PUSHLR:  in isIndirectCall()
680   case ARM::BLXi:  in isIndirectCall()
681   case ARM::TCRETURNdi:  in isIndirectCall()
682   case ARM::TAILJMPd:  in isIndirectCall()
683   case ARM::SVC:  in isIndirectCall()
684   case ARM::HVC:  in isIndirectCall()
685   case ARM::TPsoft:  in isIndirectCall()
686   case ARM::tTAILJMPd:  in isIndirectCall()
687   case ARM::t2SMC:  in isIndirectCall()
688   case ARM::t2HVC:  in isIndirectCall()
689   case ARM::tBL:  in isIndirectCall()
690   case ARM::tBLXi:  in isIndirectCall()
691   case ARM::tBL_PUSHLR:  in isIndirectCall()
692   case ARM::tTAILJMPdND:  in isIndirectCall()
693   case ARM::tSVC:  in isIndirectCall()
694   case ARM::tTPsoft:  in isIndirectCall()
709   return Opc == ARM::SpeculationBarrierISBDSBEndBB ||  in isSpeculationBarrierEndBBOpcode()
710          Opc == ARM::SpeculationBarrierSBEndBB ||  in isSpeculationBarrierEndBBOpcode()
711          Opc == ARM::t2SpeculationBarrierISBDSBEndBB ||  in isSpeculationBarrierEndBBOpcode()
712          Opc == ARM::t2SpeculationBarrierSBEndBB;  in isSpeculationBarrierEndBBOpcode()
716   return Opc == ARM::tPOP_RET || Opc == ARM::LDMIA_RET ||  in isPopOpcode()
717          Opc == ARM::t2LDMIA_RET || Opc == ARM::tPOP || Opc == ARM::LDMIA_UPD ||  in isPopOpcode()
718          Opc == ARM::t2LDMIA_UPD || Opc == ARM::VLDMDIA_UPD;  in isPopOpcode()
722   return Opc == ARM::tPUSH || Opc == ARM::t2STMDB_UPD ||  in isPushOpcode()
723          Opc == ARM::STMDB_UPD || Opc == ARM::VSTMDDB_UPD;  in isPushOpcode()
727   return Opc == ARM::SUBri ||  in isSubImmOpcode()
728          Opc == ARM::tSUBi3 || Opc == ARM::tSUBi8 ||  in isSubImmOpcode()
729          Opc == ARM::tSUBSi3 || Opc == ARM::tSUBSi8 ||  in isSubImmOpcode()
730          Opc == ARM::t2SUBri || Opc == ARM::t2SUBri12 || Opc == ARM::t2SUBSri;  in isSubImmOpcode()
734   return Opc == ARM::MOVr || Opc == ARM::tMOVr || Opc == ARM::t2MOVr;  in isMovRegOpcode()
747   if (featureBits[ARM::HasV8Ops] && (Num & 0xE) != 0xE)  in isValidCoprocessorNumber()
752   if (featureBits[ARM::HasV8_1MMainlineOps] &&  in isValidCoprocessorNumber()
762   case ARM::SEH_StackAlloc:  in isSEHInstruction()
763   case ARM::SEH_SaveRegs:  in isSEHInstruction()
764   case ARM::SEH_SaveRegs_Ret:  in isSEHInstruction()
765   case ARM::SEH_SaveSP:  in isSEHInstruction()
766   case ARM::SEH_SaveFRegs:  in isSEHInstruction()
767   case ARM::SEH_SaveLR:  in isSEHInstruction()
768   case ARM::SEH_Nop:  in isSEHInstruction()
769   case ARM::SEH_Nop_Ret:  in isSEHInstruction()
770   case ARM::SEH_PrologEnd:  in isSEHInstruction()
771   case ARM::SEH_EpilogStart:  in isSEHInstruction()
772   case ARM::SEH_EpilogEnd:  in isSEHInstruction()
874   case ARM::t2ADDri:  in getAddSubImmediate()
877   case ARM::t2SUBri:  in getAddSubImmediate()
878   case ARM::t2SUBri12:  in getAddSubImmediate()
882   case ARM::tSUBi3:  in getAddSubImmediate()
883   case ARM::tSUBi8:  in getAddSubImmediate()