Lines Matching refs:Lane
5054 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane() argument
5056 Lane = 0; in getCorrespondingDRegAndLane()
5061 Lane = 1; in getCorrespondingDRegAndLane()
5085 unsigned Lane, unsigned &ImplicitSReg) { in getImplicitSPRUseForDPRUse() argument
5095 (Lane & 1) ? ARM::ssub_0 : ARM::ssub_1); in getImplicitSPRUseForDPRUse()
5113 unsigned Lane; in setExecutionDomain() local
5156 DReg = getCorrespondingDRegAndLane(TRI, SrcReg, Lane); in setExecutionDomain()
5164 .addImm(Lane) in setExecutionDomain()
5180 DReg = getCorrespondingDRegAndLane(TRI, DstReg, Lane); in setExecutionDomain()
5183 if (!getImplicitSPRUseForDPRUse(TRI, MI, DReg, Lane, ImplicitSReg)) in setExecutionDomain()
5195 .addImm(Lane) in setExecutionDomain()