Lines Matching refs:CurReg
2589 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local
2596 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop()
2606 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop()
2607 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop()
2618 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop()
5261 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local
5262 bool CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5263 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5265 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5266 CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5267 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
5279 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5280 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5281 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5283 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5284 CurUndef = CurReg == DSrc && !MI.readsRegister(CurReg, TRI); in setExecutionDomain()
5285 MIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()