Lines Matching refs:Add

80   bool noUseOfAddBeforeLoadOrStore(const MachineInstr *Add,
95 MachineInstr *canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add,
193 bool ARCOptAddrMode::noUseOfAddBeforeLoadOrStore(const MachineInstr *Add, in noUseOfAddBeforeLoadOrStore() argument
195 Register R = Add->getOperand(0).getReg(); in noUseOfAddBeforeLoadOrStore()
231 for (auto &Add : MRI->use_nodbg_instructions(B)) { in tryToCombine() local
233 if (!isAddConstantOp(Add, Incr)) in tryToCombine()
239 MachineInstr *MoveTo = canJoinInstructions(&Ldst, &Add, &Uses); in tryToCombine()
244 if (!canFixPastUses(Uses, Add.getOperand(2), B)) in tryToCombine()
247 LLVM_DEBUG(MachineInstr *First = &Ldst; MachineInstr *Last = &Add; in tryToCombine()
255 if (MoveTo == &Add) { in tryToCombine()
257 Add.getParent()->insertAfter(Add.getIterator(), &Ldst); in tryToCombine()
259 if (Result == &Add) in tryToCombine()
266 unsigned NewBaseReg = Add.getOperand(0).getReg(); in tryToCombine()
267 changeToAddrMode(Ldst, NewOpcode, NewBaseReg, Add.getOperand(2)); in tryToCombine()
268 Add.eraseFromParent(); in tryToCombine()
276 ARCOptAddrMode::canJoinInstructions(MachineInstr *Ldst, MachineInstr *Add, in canJoinInstructions() argument
278 assert(Ldst && Add && "NULL instruction passed"); in canJoinInstructions()
280 MachineInstr *First = Add; in canJoinInstructions()
282 if (MDT->dominates(Ldst, Add)) in canJoinInstructions()
284 else if (!MDT->dominates(Add, Ldst)) in canJoinInstructions()
308 if (Add->getOperand(0).getReg() == StReg || BaseReg == StReg) { in canJoinInstructions()
317 if (&MI == Ldst || &MI == Add) in canJoinInstructions()
319 if (&MI != Add && MDT->dominates(Ldst, &MI)) in canJoinInstructions()
323 if (MDT->dominates(Add, &MI)) in canJoinInstructions()
329 if (First == Add) { in canJoinInstructions()
337 } else if (canHoistLoadStoreTo(Ldst, Add)) { in canJoinInstructions()