Lines Matching refs:zz

898 // Control bits: x, aa, di, zz
902 // zz - data size.
903 multiclass ArcLdInst<DataSizeMode zz, ExtMode x, CacheMode di, string asmop> {
904   let mayLoad = 1, ZZ = zz, X = x, DI = di in {
905     def _rs9: F32_LD_ADDR<x.Value, NoAM.Value, di.Value, zz.Value,
909     def _limm: F32_LD_LIMM<x.Value, di.Value, zz.Value,
913     def _rlimm: F32_LD_RLIMM<x.Value, NoAM.Value, di.Value, zz.Value,
918       def aa.InstSuffix#_rs9: F32_LD_RS9<x.Value, aa.Value, di.Value, zz.Value,
929   foreach zz = [ByteSM, HalfSM] in {
931 …defm LD#zz.InstSuffix#x.InstSuffix#di.InstSuffix : ArcLdInst<zz, x, di, "ld"#zz.AsmSuffix#x.AsmSuf…
972 // Control bits: aa, di, zz
975 // zz - data size.
976 multiclass ArcStInst<DataSizeMode zz, CacheMode di, string asmop> {
977   let mayStore = 1, ZZ = zz, DI = di in {
978     def _rs9: F32_ST_ADDR<NoAM.Value, di.Value, zz.Value,
982     def _limm: F32_ST_LIMM<di.Value, zz.Value,
988       def aa.InstSuffix#_rs9: F32_ST_RS9<aa.Value, di.Value, zz.Value,
998   foreach zz = [ByteSM, HalfSM, WordSM] in {
999       defm ST#zz.InstSuffix#di.InstSuffix : ArcStInst<zz, di, "st"#zz.AsmSuffix#di.AsmSuffix>;