Lines Matching refs:SubReg
53 Register Reg, unsigned SubReg) const;
55 unsigned SubReg) const;
57 unsigned SubReg) const;
512 unsigned SubReg) const { in instAccessReg()
521 LaneBitmask Overlap = TRI->getSubRegIndexLaneMask(SubReg) & in instAccessReg()
531 unsigned SubReg) const { in instReadsReg()
532 return instAccessReg(MI->uses(), Reg, SubReg); in instReadsReg()
536 unsigned SubReg) const { in instModifiesReg()
537 return instAccessReg(MI->defs(), Reg, SubReg); in instModifiesReg()
679 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
680 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
681 .addReg(Y1.Reg, 0, Y1.SubReg) in matchSwap()
682 .addReg(X1.Reg, 0, X1.SubReg).getInstr(); in matchSwap()